TMS320C6742_15 Datasheet, PDF (71/187 Pages) Texas Instruments – TMS320C6742™ Fixed- and Floating-Point DSP

www.ti.com
TMS320C6742
SPRS587E – JUNE 2009 – REVISED MARCH 2014
6.7 Interrupts
The device has a large number of interrupts to service the needs of its many peripherals and subsystems.
6.7.1 DSP Interrupts
The C674x DSP interrupt controller combines device events into 12 prioritized interrupts. The source for
each of the 12 CPU interrupts is user programmable and is listed in Table 6-6. Also, the interrupt
controller controls the generation of the CPU exceptions, NMI, and emulation interrupts. Table 6-7
summarizes the C674x interrupt controller registers and memory locations.
Refer to the C674x DSP MegaModule Reference Guide (SPRUFK5) and the TMS320C674x DSP CPU
and Instruction Set Reference Guide (SPRUFE8) for details of the C674x interrupts.
EVT#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15-17
18
19-22
22
23
24-33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
Table 6-6. C6742 DSP Interrupts
Interrupt Name
EVT0
EVT1
EVT2
EVT3
T64P0_TINT12
SYSCFG_CHIPINT2
-
EHRPWM0
EDMA3_0_CC0_INT1
EMU_DTDMA
EHRPWM0TZ
EMU_RTDXRX
EMU_RTDXTX
IDMAINT0
IDMAINT1
-
EHRPWM1
-
-
EHRPWM1TZ
-
UHPI_DSPINT
-
IIC0_INT
-
UART0_INT
-
T64P1_TINT12
GPIO_B1INT
-
SPI1_INT
-
ECAP0
-
ECAP1
Source
C674x Int Ctl 0
C674x Int Ctl 1
C674x Int Ctl 2
C674x Int Ctl 3
Timer64P0 - TINT12
SYSCFG CHIPSIG Register
Reserved
HiResTimer/PWM0 Interrupt
EDMA3_0 Channel Controller 0 Shadow Region 1 Transfer
Completion Interrupt
C674x-ECM
HiResTimer/PWM0 Trip Zone Interrupt
C674x-RTDX
C674x-RTDX
C674x-EMC
C674x-EMC
Reserved
HiResTimer/PWM1 Interrupt
Reserved
Reserved
HiResTimer/PWM1 Trip Zone Interrupt
Reserved
UHPI DSP Interrupt
Reserved
I2C0
Reserved
UART0
Reserved
Timer64P1 Interrupt 12
GPIO Bank 1 Interrupt
Reserved
SPI1
Reserved
ECAP0
Reserved
ECAP1
Copyright © 2009–2014, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
71
Submit Documentation Feedback
Product Folder Links: TMS320C6742