TMS320C6713_08 Datasheet, PDF (7/148 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PORCESSOR

TMS320C6713
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS186L − DECEMBER 2001 − REVISED NOVEMBER 2005
Table 1. Terminal Assignments for the 272-Ball GDP Package (in Order of Ball No.) (Continued)
BALL NO.
SIGNAL NAME
BALL NO.
E1
CLKS1/SCL1
J17
E2
VSS
J18
E3
GP[7](EXT_INT7)
J19
E4
VSS
J20
E17
VSS
K1
E18
HAS/ACLKX1
K2
E19
HDS1/AXR1[6]
K3
E20
HD0/AXR1[4]
K4
F1
TOUT1/AXR0[4]
K9
F2
TINP1/AHCLKX0
K10
F3
DVDD
K11
F4
CVDD
K12
F17
CVDD
K17
F18
HDS2/AXR1[5]
K18
F19
VSS
K19
F20
HCS/AXR1[2]
K20
G1
TOUT0/AXR0[2]
L1
G2
TINP0/AXR0[3]
L2
G3
CLKX0/ACLKX0
L3
G4
VSS
L4
G17
VSS
L9
G18
HCNTL0/AXR1[3]
L10
G19
HCNTL1/AXR1[1]
L11
G20
HR/W/AXR1[0]
L12
H1
FSX0/AFSX0
L17
H2
DX0/AXR0[1]
L18
H3
CLKR0/ACLKR0
L19
H4
VSS
L20
H17
VSS
M1
H18
DVDD
M2
H19
HRDY/ACLKR1
M3
H20
HHWIL/AFSR1
M4
J1
DR0/AXR0[0]
M9
J2
DVDD
M10
J3
FSR0/AFSR0
M11
J4
VSS
M12
J9
VSS
M17
J10
VSS
M18
J11
VSS
M19
J12
VSS
M20
Shading denotes the GDP package pin functions that drop out on the PYP package.
SIGNAL NAME
HOLD
HOLDA
BUSREQ
HINT/GP[1]
CVDD
VSS
CLKS0/AHCLKR0
CVDD
VSS
VSS
VSS
VSS
CVDD
ED0
ED1
VSS
FSX1
DX1/AXR0[5]
CLKX1/AMUTE0
CVDD
VSS
VSS
VSS
VSS
CVDD
ED2
ED3
CVDD
CLKR1/AXR0[6]
DR1/SDA1
FSR1/AXR0[7]
VSS
VSS
VSS
VSS
VSS
VSS
DVDD
ED4
ED5
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