TMS320C6713_08 Datasheet, PDF (57/148 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PORCESSOR

TMS320C6713
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS186L − DECEMBER 2001 − REVISED NOVEMBER 2005
SIGNAL
NAME
HD15/GP[15]
HD14/GP[14]
HD13/GP[13]
HD12/GP[12]
HD11/GP[11]
HD10/GP[10]
HD9/GP[9]
HD8/GP[8]
PIN NO.
PYP GDP
174
B14
173
C14
172
A15
168
C15
167
A16
166
B16
165
C16
160
B17
Terminal Functions (Continued)
TYPE†
IPD/
IPU‡
DESCRIPTION
GENERAL-PURPOSE INPUT/OUTPUT (GPIO)
I/O/Z
IPU ^{Host-port data pins (I/O/Z) [default] or general-purpose input/output pins}
(I/O/Z) and some function as boot configuration pins at reset.
IPU
• Used for transfer of data, address, and control
• Also controls initialization of DSP modes at reset via pullup/pulldown
resistors
IPU
As general-purpose input/output (GP[x]) functions, these pins are software-con-
IPU _{figurable through registers. The “GPxEN” bits in the GP Enable register and the}
GPxDIR bits in the GP Direction register must be properly configured:
IPU
GPxEN = 1; GP[x] pin is enabled.
IPU ^{GPxDIR = 0; GP[x] pin is an input.}
GPxDIR = 1; GP[x] pin is an output.
IPU
For the functionality description of the Host-port data pins or the boot configura-
tion pins, see the Host-Port Interface (HPI) portion of this table.
IPU
GP[7](EXT_INT7)
7
GP[6](EXT_INT6)
2
GP[5](EXT_INT5)/
AMUTEIN0
6
GP[4](EXT_INT4)/
AMUTEIN1
1
E3
General-purpose input/output pins (I/O/Z) which also function as external
interrupts
D2
• Edge-driven
• Polarity independently selected via the External Interrupt Polarity Register
C1
I/O/Z
IPU
bits (EXTPOL.[3:0])
GP[4] and GP[5] pins also function as AMUTEIN1 McASP1 mute input and
C2
AMUTEIN0 McASP0 mute input, respectively, if enabled by the INEN bit in the
associated McASP AMUTE register.
HD7/GP[3]
Host-port data pin 7 (I/O/Z) [default] or general-purpose input/output pin 3
164
A18
I/O/Z
IPU _(I/O/Z)
CLKOUT2/GP[2]
82
Y12
I/O/Z
IPD
Clock output at half of device speed (O/Z) [default] or this pin can be
programmed as GP[2] pin.
HINT/GP[1]
135
J20
O
IPU
Host interrupt (from DSP to host) (O) [default] or this pin can be programmed as
a GP[1] pin (I/O/Z).
HD4/GP[0]
Host-port data pin 4 (I/O/Z) [ default] or this pin can be programmed as a GP[0]
156
C19
I/O/Z
IPD _{pin (I/O/Z).}
RESERVED FOR TEST
RSV
RSV
198
A5
O/Z
IPU Reserved. (Leave unconnected, do not connect to power or ground)
200
B5
A§
Reserved. (Leave unconnected, do not connect to power or ground)
RSV
179
C12
O
— Reserved. (Leave unconnected, do not connect to power or ground)
RSV
—
D7
O/Z
IPD Reserved. (Leave unconnected, do not connect to power or ground)
RSV
178
D12
I
—
Reserved. This pin does not have an IPU. For proper device
operation, the D12 pin must be externally pulled down with a 10-kΩ resistor.
RSV
181
A12
Reserved. [For new designs, it is recommended that this pin be connected di-
—
rectly to CVDD (core power). For old designs, this pin can be left unconnected.
RSV
180
B11
—
Reserved. [For new designs, it is recommended that this pin be connected di-
rectly to Vss (ground). For old designs, this pin can be left unconnected.
† _{I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal}
‡ _{IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors}
no greater than 4.4 kΩ and 2.0 kΩ, respectively.]
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