TMS320C6713_08 Datasheet, PDF (33/148 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PORCESSOR

TMS320C6713
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS186L − DECEMBER 2001 − REVISED NOVEMBER 2005
Table 18. Device Configurations Pins at Device Reset (HD[4:3], HD8, and CLKMODE0)^†
CONFIGURATION
PIN
PYP
GDP
FUNCTIONAL DESCRIPTION
HD12‡
For proper C6713 device operation, do not oppose the internal pullup (IPU)
168
C15
resistor on this pin.
HD8‡
HD[4:3]
(BOOTMODE)‡
160
156, 154
B17
C19, C20
Device Endian mode (LEND)
0 – System operates in Big Endian mode
1 − System operates in Little Endian mode (default)
Bootmode Configuration Pins (BOOTMODE)
00 – HPI boot/Emulation boot
01 – CE1 width 8-bit, Asynchronous external ROM boot with default
timings (default mode)
10 − CE1 width 16-bit, Asynchronous external ROM boot with default
timings
11 − CE1 width 32-bit, Asynchronous external ROM boot with default
timings
For more detailed information on these bootmode configurations, see the
bootmode section of this data sheet.
CLKMODE0
205
Clock generator input clock source select
0 – Reserved. Do not use.
C4
1 − CLKIN square wave [default]
This pin must be pulled to the correct level even after reset.
† _{All other HD pins (HD [15, 13:9, 7:5, 2:0]) have pullups/pulldowns (IPUs or IPDs). For proper device operation of the HD [15, 13:9, 7, 1, 0], do}
not oppose these pins with external pullups/pulldowns at reset; however, the HD[6, 5, 2] pins can be opposed and driven during reset.
‡ _{IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors}
no greater than 4.4 kΩ and 2.0 kΩ, respectively.]
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