PCI1410A Datasheet, PDF (69/140 Pages) Texas Instruments – PC Card Controllers

4.24 Interrupt Pin Register
The value read from the interrupt pin register is function dependent and depends on the interrupt signaling mode,
selected through bits 2–1 (INTMODE field) of the device control register (PCI offset 92h, see Section 4.33). The
PCI1410A device defaults to serialized PCI and ISA interrupt mode.
Bit
7
6
5
4
3
2
1
0
Name
Interrupt pin
Type
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
1
Register:
Offset:
Type:
Default:
Interrupt pin
3Dh
Read-only
01h
4–13