TLV320ADC3101_15 Datasheet, PDF (65/92 Pages) Texas Instruments – TLV320ADC3101 Low-Power Stereo ADC With Embedded miniDSPnull for Wireless Handsets and Portable Audio

www.ti.com
TLV320ADC3101
SLAS553B – NOVEMBER 2008 – REVISED AUGUST 2015
BIT
READ/
WRITE
D7–D4 R/W
D3–D0 R/W
RESET
VALUE
0000
0000
Table 91. Page 1 / Register 26: Dither Control
DESCRIPTION
DC Offset Into Input of Left ADC; Signed Magnitude Number In ±15-mV Steps
1111: –105 mV
...
1011: –45 mV
1010: –30 mV
1001: –15 mV
0000: 0 mV
0001: 15 mV
0010: 30 mV
0011: 45 mV
...
0111: 105 mV
DC Offset Into Input of Right ADC; Signed Magnitude Number In ±15-mV Steps
1111: –105 mV
...
1011: –45 mV
1010: –30 mV
1001: –15 mV
0000: 0 mV
0001: 15 mV
0010: 30 mV
0011: 45 mV
...
0111: 105 mV
BIT
D7–D0
READ/
WRITE
R
Table 92. Page 1 / Register 27 Through Page 1 / Register 50: Reserved
RESET
VALUE
XXXX XXXX Reserved. Do not write to these registers.
DESCRIPTION
BIT
D7
D6 –
D5
READ/
WRITE
R
R/W
D4 – R/W
D3
D2–D0 R
RESET
VALUE
0
00
00
000
Table 93. Page 1 / Register 51: MICBIAS Control
DESCRIPTION
Reserved. Do not write any value other than reset value.
00: MICBIAS1 is powered down.
01: MICBIAS1 is powered to 2 V.
10: MICBIAS1 is powered to 2.5 V.
11: MICBIAS1 is connected to AVDD.
00: MICBIAS2 is powered down.
01: MICBIAS2 is powered to 2 V.
10: MICBIAS2 is powered to 2.5 V.
11: MICBIAS2 is connected to AVDD.
Reserved. Do not write any value other than reset value.
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: TLV320ADC3101
Submit Documentation Feedback
65