TLV320ADC3101_15 Datasheet, PDF (34/92 Pages) Texas Instruments – TLV320ADC3101 Low-Power Stereo ADC With Embedded miniDSPnull for Wireless Handsets and Portable Audio

TLV320ADC3101
SLAS553B – NOVEMBER 2008 – REVISED AUGUST 2015
10.3.12.2.7 First-Order IIR, AGC, Filter C
From Delta-Sigma
Modulator or
Digital Microphone
Filter C
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1st Order
x
IIR
AGC
Gain
Compen
sation
To Audio
Interface
AGC
From
Digital Vol. Ctrl
To Analog PGA
Figure 37. Signal Chain for PRB_R13 and PRB_R16
10.3.12.2.8 Five Biquads, First-Order IIR, AGC, Filter C
From Delta-Sigma
Modulator or
Digital Microphone
Filter C
HA
HB
HC
HD
HE
x
1st Order
IIR
AGC
Gain
Compen
sation
To Audio
Interface
AGC
From
Digital Vol. Ctrl
To Analog PGA
Figure 38. Signal Chain for PRB_R14 and PRB_R17
10.3.12.2.9 25-Tap FIR, First-Order IIR, AGC, Filter C
From Delta-Sigma
Modulator or
Digital Microphone
Filter C
25-Tap FIR
1^st Order
x
IIR
AGC
Gain
Compen
sation
To Audio
Interface
AGC
From
Digital Vol. Ctrl
To Analog PGA
Figure 39. Signal for PRB_R15 and PRB_R18
10.3.12.3 User-Programmable Filters
Depending on the selected processing block, different types and orders of digital filtering are available. A first-
order IIR filter is always available, and is useful to filter out possible dc components of the signal efficiently. Up to
five biquad sections, or alternatively up to 25-tap FIR filters, are available for specific processing blocks. The
coefficients of the available filters are arranged as sequentially indexed coefficients in two banks. If adaptive
filtering is chosen, the coefficient banks can be switched while the processor is running.
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