TMS320F28069 Datasheet, PDF (63/159 Pages) Texas Instruments – Piccolo Microcontrollers

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TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698A – NOVEMBER 2010 – REVISED JANUARY 2011
6.4 Clock Requirements and Characteristics
NO.
C9
C10
C11
C12
t_f(CI)
t_r(CI)
t_w(CIL)
t_w(CIH)
Table 6-4. XCLKIN Timing Requirements - PLL Enabled
MIN
Fall time, XCLKIN
Rise time, XCLKIN
Pulse duration, XCLKIN low as a percentage of t_c(OSCCLK)
45
Pulse duration, XCLKIN high as a percentage of t_c(OSCCLK)
45
MAX
6
6
55
55
UNIT
ns
ns
%
%
NO.
C9 t_f(CI)
C10 t_r(CI)
C11
C12
t_w(CIL)
t_w(CIH)
Table 6-5. XCLKIN Timing Requirements - PLL Disabled
MIN
Fall time, XCLKIN
Up to 20 MHz
20 MHz to 30 MHz
Rise time, XCLKIN
Up to 20 MHz
20 MHz to 30 MHz
Pulse duration, XCLKIN low as a percentage of t_c(OSCCLK)
45
Pulse duration, XCLKIN high as a percentage of t_c(OSCCLK)
45
MAX
6
2
6
2
55
55
UNIT
ns
ns
%
%
The possible configuration modes are shown in Table 3-18.
Table 6-6. XCLKOUT Switching Characteristics (PLL Bypassed or Enabled)⁽¹⁾⁽²⁾
NO.
PARAMETER
C3 t_f(XCO)
C4 t_r(XCO)
C5 t_w(XCOL)
C6 t_w(XCOH)
Fall time, XCLKOUT
Rise time, XCLKOUT
Pulse duration, XCLKOUT low
Pulse duration, XCLKOUT high
(1) A load of 40 pF is assumed for these parameters.
(2) H = 0.5t_c(XCO)
MIN
TYP
MAX
H–2
H–2
H+2
H+2
UNIT
ns
ns
ns
ns
C8
XCLKIN^(A)
C10
C9
C1
XCLKOUT^(B)
C3
C4
C6
C5
A. The relationship of XCLKIN to XCLKOUT depends on the divide factor chosen. The waveform relationship shown is
intended to illustrate the timing parameters only and may differ based on actual configuration.
B. XCLKOUT configured to reflect SYSCLKOUT.
Figure 6-3. Clock Timing
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Peripheral and Electrical Specifications
63
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