English
Language : 

TMS320F28069 Datasheet, PDF (12/159 Pages) Texas Instruments – Piccolo Microcontrollers
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698A – NOVEMBER 2010 – REVISED JANUARY 2011
0x00 0000
0x00 0040
0x00 0400
0x00 0800
0x00 0D00
0x00 0E00
0x00 1400
0x00 5000
0x00 6000
0x00 7000
0x00 8000
0x00 8800
0x00 8C00
0x00 9000
0x00 A000
0x00 C000
0x00 E000
0x01 0000
0x01 2000
0x01 4000
0x3D 7800
0x3D 7BFA
0x3D 7C80
0x3D 7CC0
0x3D 7CD0
0x3D 7E80
0x3D 7EB0
0x3D 8000
0x3F 7FF8
0x3F 8000
0x3F FFC0
Data Space
Prog Space
M0 Vector RAM (Enabled if VMAP = 0)
M0 SARAM (1K x 16, 0-Wait)
M1 SARAM (1K x 16, 0-Wait)
Peripheral Frame 0
PIE Vector - RAM
(256 x 16)
(Enabled if
VMAP = 1,
ENPIE = 1)
Reserved
Peripheral Frame 0
Reserved
Peripheral Frame 3
(4K x 16, Protected)
DMA-Accessible
Peripheral Frame 1
(4K x 16, Protected)
Reserved
Peripheral Frame 2
(4K x 16, Protected)
L0 DPSARAM (2K x 16)
(0-Wait, Secure Zone + ECSL)
L1 DPSARAM (1K x 16)
(0-Wait, Secure Zone + ECSL)
L2 DPSARAM (1K x 16)
(0-Wait, Secure Zone + ECSL)
L3 DPSARAM (4K x 16)
(0-Wait, Secure Zone + ECSL)
L4 SARAM (8K x 16)
(0-Wait, Secure Zone + ECSL, Dual Mapped)
L5 DPSARAM (8K x 16)
(0-Wait, DMA RAM 0)
L6 DPSARAM (8K x 16)
(0-Wait, DMA RAM 1)
L7 DPSARAM (8K x 16)
(0-Wait, DMA RAM 2)
L8 DPSARAM (8K x 16)
(0-Wait, DMA RAM 3)
Reserved
User OTP (1K x 16, Secure Zone + ECSL)
Reserved
Calibration Data
Get_mode function
Reserved
PARTID
Calibration Data
Reserved
FLASH
(128K x 16, 8 Sectors, Secure Zone + ECSL)
128-Bit Password
Boot ROM (32K x 16, 0-Wait)
Vector (32 Vectors, Enabled if VMAP = 1)
Figure 3-2. 28068/28067 Memory Map
www.ti.com
12
Device Overview
Copyright © 2010–2011, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065
TMS320F28064 TMS320F28063 TMS320F28062