TMS320F28044_10 Datasheet, PDF (61/115 Pages) Texas Instruments – Digital Signal Processor

TMS320F28044
www.ti.com
SPRS357C – AUGUST 2006 – REVISED JANUARY 2010
4.7 Inter-Integrated Circuit (I2C)
The F28044 device contains one I2C Serial Port. Figure 4-10 shows how the I2C peripheral module
interfaces within the F28044 device.
The I2C module has the following features:
• Compliance with the Philips Semiconductors I2C-bus specification (version 2.1):
– Support for 1-bit to 8-bit format transfers
– 7-bit and 10-bit addressing modes
– General call
– START byte mode
– Support for multiple master-transmitters and slave-receivers
– Support for multiple slave-transmitters and master-receivers
– Combined master transmit/receive and receive/transmit mode
– Data transfer rate from 10 kbps up to 400 kbps (I2C Fast-mode rate)
• One 16-word receive FIFO and one 16-word transmit FIFO
• One interrupt that can be used by the CPU. This interrupt can be generated as a result of one of the
following conditions:
– Transmit-data ready
– Receive-data ready
– Register-access ready
– No-acknowledgment received
– Arbitration lost
– Stop condition detected
– Addressed as slave
• An additional interrupt that can be used by the CPU when in FIFO mode
• Module enable/disable capability
• Free data format mode
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Peripherals
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