TMS320F28044_10 Datasheet, PDF (30/115 Pages) Texas Instruments – Digital Signal Processor

TMS320F28044
SPRS357C – AUGUST 2006 – REVISED JANUARY 2010
www.ti.com
Table 3-5. Peripheral Frame 1 Registers^{(1) (2)}
NAME
ADDRESS RANGE
SIZE (x16)
ePWM1 + HRPWM Registers
0x6800 – 0x683F
64
ePWM2 + HRPWM Registers
0x6840 – 0x687F
64
ePWM3 + HRPWM Registers
0x6880 – 0x68BF
64
ePWM4 + HRPWM Registers
0x68C0 – 0x68FF
64
ePWM5 + HRPWM Registers
0x6900 – 0x693F
64
ePWM6 + HRPWM Registers
0x6940 – 0x697F
64
ePWM7 + HRPWM Registers
0x6980 – 0x69BF
64
ePWM8 + HRPWM Registers
0x69C0 – 0x69FF
64
ePWM9 + HRPWM Registers
0x6600 – 0x663F
64
ePWM10 + HRPWM Registers
0x6640 – 0x667F
64
ePWM11 + HRPWM Registers
0x6680 – 0x66BF
64
ePWM12 + HRPWM Registers
0x66C0 – 0x66FF
64
ePWM13 + HRPWM Registers
0x6700 – 0x673F
64
ePWM14 + HRPWM Registers
0x6740 – 0x677F
64
ePWM15 + HRPWM Registers
0x6780 – 0x67BF
64
ePWM16 + HRPWM Registers
0x67C0 – 0x67FF
64
GPIO Control Registers
0x6F80 – 0x6FBF
128
GPIO Data Registers
0x6FC0 – 0x6FDF
32
GPIO Interrupt and LPM Select Registers
0x6FE0 – 0x6FFF
32
(1) All 32-bit accesses are aligned to even address boundaries.
(2) Missing segments of memory space are reserved and should not be used in applications.
ACCESS TYPE
Some ePWM registers are EALLOW
protected. See Table 4-2 through
Table 4-5.
EALLOW protected
Not EALLOW protected
EALLOW protected
Table 3-6. Peripheral Frame 2 Registers^{(1) (2)}
NAME
ADDRESS RANGE
SIZE (x16)
ACCESS TYPE
System Control Registers
0x7010 – 0x702F
32
EALLOW Protected
SPI-A Registers
0x7040 – 0x704F
16
SCI-A Registers
0x7050 – 0x705F
16
External Interrupt Registers
0x7070 – 0x707F
16
Not EALLOW Protected
ADC Registers
I²C Registers
0x7100 – 0x711F
32
0x7900 – 0x792F
48
(1) Peripheral Frame 2 only allows 16-bit accesses. All 32-bit accesses are ignored (invalid data may be returned or written).
(2) Missing segments of memory space are reserved and should not be used in applications.
3.4 Device Emulation Registers
These registers are used to control the protection mode of the C28x CPU and to monitor some critical
device signals. The registers are defined in Table 3-7.
Table 3-7. Device Emulation Registers
NAME
DEVICECNF
PARTID
REVID
PROTSTART
PROTRANGE
ADDRESS RANGE
0x0880 –
0x0881
0x0882
0x0883
0x0884
0x0885
SIZE (x16)
2
1
1
1
1
DESCRIPTION
Device Configuration Register
Part ID Register
0x00FC – F28044
Revision ID Register
0x0000 – Silicon Rev. 0 - TMX or TMS
Block Protection Start Address Register
Block Protection Range Address Register
30
Functional Overview
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