TMS320F28044_10 Datasheet, PDF (51/115 Pages) Texas Instruments – Digital Signal Processor

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ADCINA0
ADCINA7
ADCINB0
ADCINB7
Analog
MUX
TMS320F28044
SPRS357C – AUGUST 2006 – REVISED JANUARY 2010
System
Control Block
High-Speed
Prescaler
SYSCLKOUT
DSP
ADCENCLK HALT
HSPCLK
Result Registers
Result Reg 0
70A8h
Result Reg 1
S/H
12-Bit
ADC
Module
Result Reg 7
Result Reg 8
70AFh
70B0h
S/H
Result Reg 15
70B7h
S/W
EPWMSOCA
GPIO/XINT2_
ADCSOC
SOC
ADC Control Registers
Sequencer 1
Sequencer 2
SOC
Figure 4-5. Block Diagram of the ADC Module
S/W
EPWMSOCB
To obtain the specified accuracy of the ADC, proper board layout is very critical. To the best extent
possible, traces leading to the ADCIN pins should not run in close proximity to the digital signal paths.
This is to minimize switching noise on the digital lines from getting coupled to the ADC inputs.
Furthermore, proper isolation techniques must be used to isolate the ADC module power pins (V_DD1A18,
V_DD2A18 , V_DDA2, V_DDAIO) from the digital supply. Figure 4-6 shows the ADC pin connections for the F28044
device.
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Peripherals
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