SN74ALVCH16831 Datasheet, PDF (6/9 Pages) Texas Instruments – 1-TO-4 ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS

SN74ALVCH16831
1-TO-4 ADDRESS REGISTER/DRIVER
WITH 3-STATE OUTPUTS
SCES083F – AUGUST 1996 – REVISED SEPTEMBER 2004
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
C_L
(see Note A)
V_LOAD
R_L
S1
Open
GND
R_L
TEST
t_pd
t_PLZ/t_PZL
t_PHZ/t_PZH
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S1
Open
V_LOAD
GND
LOAD CIRCUIT
V_CC
1.8 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
INPUT
V_I
t_r/t_f
V_CC
V_CC
2.7 V
2.7 V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
V_M
V_CC/2
V_CC/2
1.5 V
1.5 V
V_LOAD
2 × V_CC
2 × V_CC
6V
6V
C_L
30 pF
30 pF
50 pF
50 pF
R_L
1 kΩ
500 Ω
500 Ω
500 Ω
V_∆
0.15 V
0.15 V
0.3 V
0.3 V
Timing
Input
Data
Input
V_I
V_M
0V
t_su
t_h
V_I
V_M
V_M
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Input
V_M
V_I
V_M
0V
t_PLH
t_PHL
Output
V_OH
V_M
V_M
V_OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
Input
t_w
V_M
V_I
V_M
0V
VOLTAGE WAVEFORMS
PULSE DURATION
Output
Control
(low-level
V_M
enabling)
V_I
V_M
0V
t_PZL
Output
Waveform 1
S1 at V_LOAD
V_M
(see Note B)
t_PLZ
V_OL + V_∆
V_LOAD/2
V_OL
t_PZH
Output
Waveform 2
S1 at GND
V_M
(see Note B)
t_PHZ
V_OH − V_∆
V_OH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C_L includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. t_PLZ and t_PHZ are the same as t_dis.
F. t_PZL and t_PZH are the same as t_en.
G. t_PLH and t_PHL are the same as t_pd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
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