BQ24640 Datasheet, PDF (6/25 Pages) Texas Instruments – High-Efficiency Synchronous Switch-Mode Super Capacitor Charger

bq24640
SLUSA44 – MARCH 2010
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ELECTRICAL CHARACTERISTICS (continued)
5.0 V ≤ V(VCC) ≤28 V, 0°C < T < +125°C, typical values are at T_A = 25°C, with respect to GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
THERMISTOR COMPARATOR
V_LTF
V_{LTF_HYS}
V_HTF
V_TCO
Cold temperature rising threshold
Rising hysteresis
Hot temperature rising threshold
Cut-off temperature rising threshold
Deglitch time for temperature out of
range detection
As percentage to V_VREF
As percentage to V_VREF
As percentage to V_VREF
As percentage to V_VREF
V_TS < V_LTF, or V_TS < V_TCO, or V_TS < V_HTF
72.5% 73.5% 74.5%
0.2% 0.4% 0.6%
36.4% 37% 37.6%
33.7% 34.4% 35.1%
400
ms
Deglitch time for temperature in
valid range detection
V_TS > V_LTF – V_{LTF_HYS} or V_TS >V_TCO, or V_TS
> V_HTF
CHARGE OVER-CURRENT COMPARATOR (CYCLE-BY-CYCLE)
20
ms
Current rising, in non-synchronous mode,
Charge over-current rising threshold ^{measure on V(SRP-SRN), VSRP < 2V}
45.5
mV
V_OC
Current rising, as percentage of V_{(IREG_CHG)},
in synchronous mode, V_SRP > 2.2V
160%
Charge over-current threshold floor
Minimum OCP threshold in synchronous
mode, measure on V_(SRP-SRN), V_SRP > 2.2V
50
mV
Charge over-current threshold
ceiling
Maximum OCP threshold in synchronous
mode, measure on V_(SRP-SRN), V_SRP > 2.2V
180
mV
CHARGE UNDER-CURRENT COMPARATOR (CYCLE-BY-CYCLE)
V_ISYNSET
Charge under-current falling
threshold
Switch from CCM to DCM, V_SRP>2.2V
1
5
9 mV
LOW CHARGE CURRENT COMPARATOR
Low charge current (average) falling
V_LC
threshold to force into
Measure V_(SRP-SRN)
non-synchronous mode
1.25
mV
V_{LC_HYS}
Low charge current rising hysteresis
V_{LC_DEG}
Deglitch on both edge
VREF REGULATOR
1.25
mV
1
µs
V_{VREF_REG}
VREF regulator voltage
I_{VREF_LIM}
VREF current limit
REGN REGULATOR
V_VCC > V_UVLO (0–35 mA load)
V_VREF = 0 V, V_VCC > V_UVLO
3.267
35
3.3 3.333 V
mA
V_{REGN_REG}
REGN regulator voltage
I_{REGN_LIM}
REGN current limit
PWM HIGH SIDE DRIVER (HIDRV)
V_VCC > 10V, CE = HIGH (0–40mA load)
V_REGN = 0V, V_VCC > V_UVLO, CE = HIGH
5.7 6.0 6.3 V
40
mA
R_{DS_HI_ON}
High side driver (HSD) turn-on
resistance
V_BTST – V_PH = 5.5 V
3.3
6Ω
R_{DS_HI_OFF}
V_{BTST_REFRESH}
High side driver turn-off resistance
Bootstrap refresh comparator
threshold voltage
V_BTST – V_PH = 5.5 V
VBTST – VPH when low side refresh pulse
is requested
1 1.3 Ω
4.0 4.2
V
PWM LOW SIDE DRIVER (LODRV)
R_{DS_LO_ON}
Low side driver (LSD) turn-on
resistance
4.1
7Ω
R_{DS_LO_OFF}
Low side driver turn-off resistance
PWM DRIVERS TIMING
1 1.4 Ω
Driver Dead-Time
Dead time when switching between LSD and
HSD, no load at LSD and HSD
30
ns
PWM OSCILLATOR
V_{RAMP_HEIGHT}
PWM ramp height
PWM switching frequency
As percentage of VCC
7%
510 600 690 kHz
6
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