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PCI1450 Datasheet, PDF (58/132 Pages) Texas Instruments – PC Card Controllers | |||
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PCI1450 GFN/GJG
PC CARD CONTROLLER
SCPS044 â SEPTEMBER 1998
subsystem vendor ID register
Bit
15â¡ 14â¡ 13â¡ 12â¡ 11â¡ 10â¡ 9â¡ 8â¡ 7â¡ 6â¡ 5â¡ 4â¡ 3â¡ 2â¡ 1â¡ 0â¡
Name
Subsystem vendor ID
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
â¡ This bit is cleared only by the assertion of G_RST.
Register: Subsystem vendor ID
Type:
Read-only, Read/Write (when bit 5 in the system control register is 0.)
Offset:
40h (Functions 0, 1)
Default: 0000h
Description: This register, used for system and option card identification purposes, may be required for
certain operating systems. This register is read-only or read/write, depending on the setting of
bit 5 (SUBSYSRW) in the system control register. When bit 5 is 0, this register is read/write;
when bit 5 is 1, this register is read-only. The default mode is read-only.
subsystem ID register
Bit
15â¡ 14â¡ 13â¡ 12â¡ 11â¡ 10â¡ 9â¡ 8â¡ 7â¡ 6â¡ 5â¡ 4â¡ 3â¡ 2â¡ 1â¡ 0â¡
Name
Subsystem ID
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
â¡ This bit is cleared only by the assertion of G_RST.
Register: Subsystem ID
Type:
Read-only, Read/Write (when bit 5 in the system control register is 0.)
Offset:
42h (Functions 0, 1)
Default: 0000h
Description: This register, used for system and option card identification purposes, may be required for
certain operating systems. This register is read-only or read/write, depending on the setting of
bit 5 (SUBSYSRW) in the system control register. When bit 5 is 0, this register is read/write;
when bit 5 is 1, this register is read-only. The default mode is read-only.
If an EEPROM is present, then the subsystem ID and subsystem vendor ID will be loaded
from EEPROM after an reset.
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