MSP430F543X_1 Datasheet, PDF (57/90 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F543x, MSP430F541x
MSP430F543xA, MSP430F541xA
www.ti.com.......................................................................................................................................................................................... SLAS612 – SEPTEMBER 2008
STE
UCLK
CKPL = 0
CKPL = 1
SIMO
t_STE,LEAD
1/f_UCxCLK
t_LOW/HIGH
t_LOW/HIGH
t_STE,LAG
t_SU,SI
t_HD,SI
SOMI
t_ACC
t_VALID,SO
t_DIS
Figure 14. SPI Slave Mode, CKPH = 1
USCI (I2C Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 15)
f_USCI
f_SCL
t_HD,STA
t_SU,STA
t_HD,DAT
t_SU,DAT
t_SU,STO
t_SP
PARAMETER
USCI input clock frequency
SCL clock frequency
Hold time (repeated) START
Setup time for a repeated START
Data hold time
Data setup time
Setup time for STOP
TEST CONDITIONS
Internal: SMCLK, ACLK
External: UCLK
Duty cycle = 50% ± 10%
f_SCL ≤ 100 kHz
f_SCL > 100 kHz
f_SCL ≤ 100 kHz
f_SCL > 100 kHz
f_SCL ≤ 100 kHz
f_SCL > 100 kHz
Pulse width of spikes suppressed by input filter
V_CC
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
2.2 V
3V
MIN TYP MAX UNIT
f_SYSTEM MHz
0
400 kHz
4.0
µs
0.6
4.7
µs
0.6
0
ns
250
ns
4.0
µs
0.6
50
600
ns
50
600
SDA
t_HD,STA
t_SU,STA
t_HD,STA
t_BUF
t_LOW
t_HIGH
t_SP
SCL
t_HD,DAT
t_SU,DAT
Figure 15. I2C Mode Timing
t_SU,STO
Copyright © 2008, Texas Instruments Incorporated
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