ADS62P25 Datasheet, PDF (55/71 Pages) Texas Instruments – DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

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ADS62P25, ADS62P24
ADS62P23, ADS62P22
SLAS576A – OCTOBER 2007 – REVISED FEBRUARY 2008
2065
2060
2055
2050
Device With
Offset Cancelled
2045
2040
2035
Offset Loop
Enabled Here
Device With
Initial Offset
2030
0
2
4
6
8
10 12 14
t − Time − s
G084
Figure 99. Time Response of Offset Correction
Gain Correction
ADS62P2X has ability to make fine corrections to the ADC channel gain. The corrections can be done in steps of
0.05 dB, up to a maximum of 0.5 dB, using the register bits (GAIN CORRECTION). Only positive corrections are
supported and the same correction applies to both the channels.
Table 21. Gain Correction Values
<GAIN CORRECTION>
D3-D2-D1-D0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
Other combinations
AMOUNT OF CORRECTION,
dB
0
+0.05
+0.1
+0.15
+0.20
+0.25
+0.30
+0.35
+0.40
+0.45
+0.5
Unused
Copyright © 2007–2008, Texas Instruments Incorporated
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