ADS62C17_1 Datasheet, PDF (55/67 Pages) Texas Instruments – Dual Channel 11 Bit, 200 MSPS ADC With SNRBoost

ADS62C17
www.ti.com ............................................................................................................................................................. SLAS631A – APRIL 2009 – REVISED JULY 2009
CLKOUTM
CLKOUTP
DA0, DB0
DA2, DB2
DA4,DB4
DA6,DB6
DA8,DB8
DA10,DB10
0
D0
0
D0
D1
D2
D1
D2
D3
D4
D3
D4
D5
D6
D5
D6
D7
D8
D7
D8
D9
D10
D9
D10
SAMPLE N
SAMPLE N+1
Figure 58. DDR LVDS Interface
LVDS Buffer
The equivalent circuit of each LVDS output buffer is shown in Figure 59. The buffer is designed to present an
output impedance of 100Ω (Rout). The differential outputs can be terminated at the receive end by a 100Ω
termination.
The buffer output impedance behaves like a source-side series termination. By absorbing reflections from the
receiver end, it helps to improve signal integrity. Note that this internal termination cannot be disabled and its
value cannot be changed.
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