ADS62C17_1 Datasheet, PDF (40/67 Pages) Texas Instruments – Dual Channel 11 Bit, 200 MSPS ADC With SNRBoost

ADS62C17
SLAS631A – APRIL 2009 – REVISED JULY 2009 ............................................................................................................................................................. www.ti.com
TYPICAL CHARACTERISTICS (continued)
All plots are at 25 °C, AVDD = 3.3 V, DRVDD = 1.8 V, sampling frequency = 200 MSPS, sine wave input clock. 1.5 VPP
differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, SNRBoost disabled, internal reference
mode, 0 dB gain, LVDS output interface (unless otherwise noted)
CMRR
vs
FREQUENCY
-30
POWER DISSIPATION ACROSS
SAMPLING FREQUENCY
1.3
-35
1.2
-40
1.1
1
-45
0.9
-50
0.8
-55
0.7
-60
0.6
-65
0.5
-70
20
40 60 80 100 130 170 230 270
Common-Mode Frequency - MHz
Figure 36.
0.4
0 25
140.4
120.4
DRVDD CURRENT ACROSS
SAMPLING FREQUENCY
Fin = 2.5 MHz
LVDS
CMOS
(No load Capacitance)
50 75 100 125 150 175 200
Sampling frequency - MSPS
Figure 37.
100.4
80.4
LVDS
60.4
40.4
CMOS
No load Capacitance
20.4
CMOS 15 pF
Load Capacitance
0.4
0 25 50 75 100 125 150 175 200
Sampling Frequency - MSPS
Figure 38.
40
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