ADS6245 Datasheet, PDF (55/76 Pages) Texas Instruments – DUAL CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS

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ADS6245, ADS6244
ADS6243, ADS6242
SLAS542A – MAY 2007 – REVISED JULY 2007
2-WIRE INTERFACE - 14× SERIALIZATION
The 14-bit ADC data is serialized and output over two LVDS pairs. A frame clock at 1× sample frequency is also
available with an SDR bit clock. With DDR bit clock option, the frame clock frequency is 0.5× sample frequency.
The output data rate will be 7 × Sample frequency as 7 data bits are output every clock cycle on each wire. Each
ADC sample is sent over the 2 wires as byte-wise or bit-wise or word-wise.
Copyright © 2007, Texas Instruments Incorporated
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