TMS320VC549_06 Datasheet, PDF (52/63 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSOR

TMS320VC549
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS078G − SEPTEMBER 1998 − REVISED OCTOBER 2004
serial-port transmit timing in TDM mode (continued)
timing requirements over recommended ranges of supply voltage and operating free-air
temperature [H = 0.5t_c(CO)] (see Figure 28)
549−80
549-100
549-120
UNIT
MIN MAX
tc(SCK)
Cycle time, serial-port clock
16H†
‡ _ns
tf(SCK)
Fall time, serial-port clock
6 ns
tr(SCK)
Rise time, serial-port clock
6 ns
tw(SCK)
Pulse duration, serial-port clock low/high
8H†
ns
† _{When SCK is generated internally, this value is typical.}
‡ _{The serial-port design is fully static and, therefore, can operate with tc(SCK) approaching 1. It is characterized approaching an input frequency}
of 0 Hz but tested as a much higher frequency to minimize test time.
TCLK
TDAT
TADD
TFRM
tw(SCK)
tw(SCK)
tc(SCK)
B15
B0
th(TCH-TDV)
td(TCH-TFV)
td(TCH-TFV)
td(TC-TDV)
B14
B13
th(TCH-TDV)
td(TC-TDV)
A1
A2
A0
B12 B8 B7
A3 A7
Figure 28. Serial-Port Transmit Timing in TDM Mode
tf(SCK)
tr(SCK)
B2
B1
B0
52
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443