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| TMS320DM355 Datasheet, PDF (52/153 Pages) Texas Instruments – Digital Media System-on-Chip (DMSoC) | |||
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TMS320DM355
Digital Media System-on-Chip (DMSoC)
SPRS463 â SEPTEMBER 2007
Name
ASP1_CLKS
RESET
MXI1
MXO1
MXI2
MXO2
TCK
TDI
TDO
TMS
TRST
RTCK
EMU0
EMU1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MX2GND
VSS
VSS
VSS
VSS
VSS
Table 2-23. DM355 Pin Descriptions (continued)
Pin BGA Type Grou Power PU Reset
#
ID
(1)
p
Supply(2) PD(3 State
)
Description (4)
211 D17 I ASP5
VDD
121
212 D11 I
VDD
213 A9
I Clock
VDD
s
214 B9 O Clock
VDD
s
215 R1
I Clock
VDD
s
216 T1 O Clock
VDD
s
217 E10 I EMUL
VDD
ATIO
N
218 D9
I EMUL
VDD
ATIO
N
219 E9 O EMUL
VDD
ATIO
N
220 D8
I EMUL
VDD
ATIO
N
221 C9
I EMUL
VDD
ATIO
N
222 E11 O EMUL
VDD
ATIO
N
223 E8 I/O EMUL
VDD
ATIO
N
224 E7 I/O EMUL
VDD
ATIO
N
225 A5 GND
226 A8 GND
227 A19 GND
228 B5 GND
229 B8 GND
230 B10 GND
231 D1 GND
232 P1 GND
233 E2 GND
234 E15 GND
235 G2 GND
236 G9 GND
237 H1 GND
in ASP1: Master Clock
PU in Global Chip Reset (active low)
in Crystal input for system oscillator (24
MHz)
out Output for system oscillator (24 MHz)
in Crystal input for video oscillator (27
MHz). This crystal is not required
VDD
out Output for video oscillator (27 MHz). This
crystal is not required.
VDD
PU in JTAG test clock input
PU in JTAG test data input
out L JTAG test data output
PU in JTAG test mode select
PD in JTAG test logic reset (active low)
out L JTAG test clock output
PU in JTAG emulation 0 I/O
VDD
VDD
PU in JTAG emulation 1 I/O
EMU[1:0] = 00 - Force Debug Scan chain
(ARM and ARM ETB TAPs connected)
EMU[1:0] = 11 - Normal Scan chain
(ICEpick only)
Digital ground
Digital ground
Digital ground
Digital ground
Digital ground
Digital ground
Digital ground
Video oscillator (27 MHz) - ground
Digital ground
Digital ground
Digital ground
Digital ground
Digital ground
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