CD74HC137_07 Datasheet, PDF (5/19 Pages) Texas Instruments – High-Speed CMOS Logic, 3- to 8-Line Decoder/Demultiplexer with Address Latches

CD74HC137, CD74HCT137, CD54HC237, CD74HC237, CD74HCT237
DC Electrical Specifications (Continued)
PARAMETER
Quiescent Device
Current
SYMBOL
I_CC
TEST
CONDITIONS
V_I (V)
V_CC or
GND
I_O (mA)
0
V_CC
(V)
6
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
MIN TYP MAX MIN MAX MIN MAX UNITS
-
-
8
-
80
-
160
µA
HCT TYPES
High Level Input
Voltage
V_IH
-
-
4.5 to
2
-
-
2
-
2
-
V
5.5
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
V_IL
-
-
4.5 to
-
-
0.8
-
0.8
-
0.8
V
5.5
V_OH V_IH or V_IL -0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
V_OL V_IH or V_IL 0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
4
4.5
-
-
0.26
-
0.33
-
Input Leakage
Current
I_I
V_CC and
0
5.5
-
-
±0.1
-
±1
-
GND
Quiescent Device
Current
I_CC
V_CC or
0
5.5
-
-
8
-
80
-
GND
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I_CC
(Note 2)
V_CC
-2.1
-
4.5 to
-
100 360
-
450
-
5.5
NOTE:
2. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
0.4
V
±1
µA
160
µA
490
µA
HCT Input Loading Table
INPUT
UNIT LOADS
All
1.5
NOTE:
360µA
mUanxitaLto2a5d^{oiCs.∆ICC}
limit
specified
in
DC
Electrical
Table,
e.g.,
Prerequisite For Switching Specifications
PARAMETER
HC TYPES
A_n to LE Setup Time
A_n to LE Hold Time
SYMBOL
t_SU
t_H
V_CC
(V)
2
4.5
6
2
4.5
6
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
MIN TYP MAX MIN MAX MIN MAX UNITS
50
-
-
65
-
75
-
ns
10
-
-
13
-
15
-
ns
9
-
-
11
-
13
-
ns
30
-
-
40
-
45
-
ns
6
-
-
8
-
9
-
ns
5
-
-
7
-
8
-
ns
5