BQ4013 Datasheet, PDF (5/14 Pages) Texas Instruments – 128Kx8 Nonvolatile SRAM

AC Test Conditions
Parameter
Input pulse levels
Input rise and fall times
Input and output timing reference levels
Output load (including scope and jig)
bq4013/Y
Test Conditions
0V to 3.0V
5 ns
1.5 V (unless otherwise specified)
See Figures 1 and 2
Figure 1. Output Load A
Figure 2. Output Load B
Read Cycle (TA = TOPR, _VCCmin ≤ VCC ≤ VCCmax)
Symbol
Parameter
tRC
Read cycle time
tAA
Address access time
tACE
Chip enable access time
tOE
Output enable to output valid
tCLZ
Chip enable to output in low Z
tOLZ
Output enable to output in low Z
tCHZ
Chip disable to output in high Z
tOHZ
Output disable to output in high Z
tOH
Output hold from address change
-70/-70N
-85/-85N
-120
Min. Min. Min. Max. Min. Max. Unit Conditions
70
-
85
- 120 -
ns
-
70
-
85
- 120 ns Output load A
-
70
-
85
- 120 ns Output load A
-
35
-
45
- 60 ns Output load A
5
-
5
-
5
-
ns Output load B
0
-
0
-
0
-
ns Output load B
0
25
0
35
0 45 ns Output load B
0
25
0
25
0 35 ns Output load B
10
-
10
-
10 -
ns Output load A
5