ADS62P15_09 Datasheet, PDF (5/64 Pages) Texas Instruments – Dual Channel 11-Bits,125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs

ADS62P15
www.ti.com .................................................................................................................................................... SLAS572B – OCTOBER 2007 – REVISED APRIL 2009
ELECTRICAL CHARACTERISTICS
Typical values at 25°C, min and max values are across the full temperature range T_MIN = –40°C to T_MAX = 85°C, AVDD =
3.3V, DRVDD = 1.8V to 3.3V, sampling frequency = 125 MSPS, 50% clock duty cycle, –1dBFS differential analog input,
internal reference mode, applies to CMOS and LVDS interfaces (unless otherwise noted).
PARAMETER
TEST CONDITIONS
Resolution
ANALOG INPUTS
Differential input voltage range
Differential input resistance (at dc)
See Figure 33
Differential input capacitance
See Figure 34
Analog input bandwidth
Analog input common mode current (per input pin)
VCM common mode voltage output
VCM output current capability
POWER SUPPLY
Analog supply current (AVDD)
I_SS
Output buffer supply current (DRVDD)
CMOS interface
DRVDD=1.8V, 2.5 MHz input signal
no load capacitance⁽¹⁾
Total power – CMOS interface
Total power – CMOS interface
DRVDD=3.3V, 50MHz input signal
10pF load capacitance
Total power – LVDS interface
DRVDD = 3.3V
Global power down
DC ACCURACY
No missing codes
DNL
Differential Non-Linearity
INL
Integral Non-Linearity
E_O
Offset Error
Offset error temperature coefficient
There are two sources of gain error – internal reference inaccuracy and channel gain error
E_GREF
E_GCHAN
Gain error due to internal reference inaccuracy
alone
Gain error of channel alone⁽²⁾
Channel gain error temperature coefficient
MIN
TYP MAX UNIT
11 bits
2
V_PP
>1
MΩ
7
pF
450
MHz
125
µA
1.5
V
4
mA
216
mA
17
0.74
W
1.225 W
0.94
W
30
60 mW
Specified
-0.8
±0.4
-3.5
±1
-10
±3
0.05
0.8 LSB
3.5 LSB
10 mV
mV/°C
-1 ±0.25
-1
±0.3
0.005
1 %FS
1 %FS
Δ%/°C
(1) In CMOS mode, the DRVDD current scales with the sampling frequency and the load capacitance on output pins (see Figure 30).
(2) This is specified by design and characterization; it is not tested in production.
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