ADS62P15_09 Datasheet, PDF (28/64 Pages) Texas Instruments – Dual Channel 11-Bits,125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs

ADS62P15
SLAS572B – OCTOBER 2007 – REVISED APRIL 2009 .................................................................................................................................................... www.ti.com
PIN NAME
AVDD
AGND
CLKP, CLKM
INP_A, INM_A
INP_B, INM_B
VCM
RESET
SCLK
SDATA
SEN
CTRL1
CTRL2
CTRL3
DA0 to DA10
DB0 to DB10
CLKOUT
DRVDD
DRGND
PAD
SDOUT
NC
Pin Assignments (CMOS INTERFACE)
DESCRIPTION
PIN NUMBER
Analog power supply
Analog ground
Differential input clock
Differential input signal – channel A
Differential input signal – channel B
Internal reference mode – Common-mode voltage output.
External reference mode – Reference input. The voltage forced on this pin sets
the ADC internal references.
Serial interface RESET input.
In serial interface mode, the user must initialize internal registers through
hardware RESET by applying a high-going pulse on this pin or by using
software reset (refer to Serial Interface section).
In parallel interface mode, the user has to tie RESET pin permanently high.
(SCLK, SDATA and SEN are used as parallel pin controls in this mode) The pin
has an internal 100 kΩ pull-down resistor.
This pin functions as serial interface clock input when RESET is low.
It functions as analog control pin when RESET is tied high & controls coarse
gain and internal/external reference selection. See Table 4 for details.
The pin has an internal pull-down resistor to ground.
This pin functions as serial interface data input when RESET is low. The pin has
an internal pull-down resistor to ground.
This pin functions as serial interface enable input when RESET is low.
It functions as analog control pin when RESET is tied high & controls the output
interface (LVDS/CMOS) and data format selection. See Table 5 for details.
The pin has an internal pull-up resistor to AVDD.
These are digital logic input pins. Together they control various power down and
multiplexed mode. see Table 6 for details
Channel A 11-bit data outputs, CMOS
Channel B 11-bit data outputs, CMOS
CMOS Output clock
Digital supply
Digital ground
Digital ground. Solder the pad to the digital ground on the board using multiple
vias for good electrical and thermal performance.
It functions as serial data readout pin ONLY when <SERIAL READOUT> =1.
When <SERIAL READOUT> = 0, SDOUT pin is forced low or high by the
device (and not put in high-impedance state). If serial readout is not used,
SDOUT pin has to be floated & should not be connected on the board.
Do not connect
16, 33, 34
17, 18, 21, 22, 24,
27, 28, 31, 32
25, 26
29, 30
19, 20
23
12
13
14
15
35
36
37
43 - 47, 50 - 55
63, 2 - 11
57
1, 38, 48, 58
39, 49, 59, 64 and
PAD
–
56
40, 41, 42, 60, 61,
62
NUMBER OF
PINS
3
9
2
2
2
1
1
1
1
1
1
1
1
11
11
1
4
4
1
1
7
28
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