TM4C123GH6PZI Datasheet, PDF (481/1435 Pages) Texas Instruments – Tiva TM4C123GH6PZ Microcontroller

Tiva^™ TM4C123GH6PZ Microcontroller _{(identical to LM4F232H5QC)}
Bit/Field
27:26
25
24
23:21
20
19:18
17
16
15:7
6
5:4
Name
reserved
CAN1
CAN0
reserved
PWM0
reserved
ADC1
ADC0
reserved
HIB
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0x0
0x0
0
0x0
0
0x0
0x0
0
0x1
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
CAN1 Clock Gating Control
This bit controls the clock gating for CAN module 1. If set, the module
receives a clock and functions. Otherwise, the module is unclocked and
disabled. If the module is unclocked, a read or write to the module
generates a bus fault.
CAN0 Clock Gating Control
This bit controls the clock gating for CAN module 0. If set, the module
receives a clock and functions. Otherwise, the module is unclocked and
disabled. If the module is unclocked, a read or write to the module
generates a bus fault.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM Clock Gating Control
This bit controls the clock gating for the PWM module. If set, the module
receives a clock and functions. Otherwise, the module is unclocked and
disabled. If the module is unclocked, a read or write to the module
generates a bus fault.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
ADC1 Clock Gating Control
This bit controls the clock gating for ADC module 1. If set, the module
receives a clock and functions. Otherwise, the module is unclocked and
disabled. If the module is unclocked, a read or write to the module
generates a bus fault.
ADC0 Clock Gating Control
This bit controls the clock gating for ADC module 0. If set, the module
receives a clock and functions. Otherwise, the module is unclocked and
disabled. If the module is unclocked, a read or write to the module
generates a bus fault.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
HIB Clock Gating Control
This bit controls the clock gating for the Hibernation module. If set, the
module receives a clock and functions. Otherwise, the module is
unclocked and disabled. If the module is unclocked, a read or write to
the module generates a bus fault.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
July 17, 2013
481
Texas Instruments-Production Data