ADS58H40_15 Datasheet, PDF (48/59 Pages) Texas Instruments – Quad-Channel, 250-MSPS Receiver and Feedback ADC

ADS58H40
SBAS589B – AUGUST 2012 – REVISED NOVEMBER 2012
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Overrange Indication (OVRxx)
The ADS58H40 outputs overrange information on the Dxx0P and Dxx0M pins (where xx = channels A and B or
channels C and D) of the digital output interface. When transmitting high-resolution (14-bit) output data in burst
mode, Dxx0P and Dxx0M transmit the output data LSB instead. An OVR timing diagram is shown in Figure 57.
CLKOUTP,
CLKOUTM
DAB13P, DAB13M
(MSB)
A
B
A
B
DAB12P,
DAB12M
DAB4P,
DAB4M
A
B
A
B
SNRBoost^3G+
11-Bit Output
A
B
A
B
DAB3P, DAB3M
(LSB)
A
B
A
B
DAB2P,
DAB2M
Not Valid Output Data
DAB1P,
DAB1M
Not Valid Output Data
OVRABP, OVRABM
(DAB0P, DAB0M)
A
B
A
B
Overrange
Indicator
Sample N
Sample N+1
Figure 57. Overrange Indicator (OVR) Timing
Normal overrange indication (OVR) shows the event of the ADS58H40 digital output being saturated when the
input signal exceeds the ADC full-scale range. Normal OVR has the same latency as digital output data.
However, an overrange event can be indicated earlier (than normal latency) by using the fast OVR mode. The
fast OVR mode (enabled by default) is triggered seven clock cycles after the overrange condition that occurred at
the ADC input. The fast OVR thresholds are programmable with the FAST OVR THRESH PROG bits (refer to
Table 4, register address C3h). At any time, either normal or fast OVR mode can be programmed on the Dxx0P
and Dxx0M pins. A block diagram indicating required register writes to enable OVR is shown in Figure 58.
Dxx[13:1]
Fast OVR
Normal OVR
0
Dxx[0]
0
0
1
1
1
HIRES Bit
BMODE OVR ENABLE Bit
SEL OVR Bit
Figure 58. OVR Block Diagram
Dxx[0]/OVR
48
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