THS1215 Datasheet, PDF (4/22 Pages) Texas Instruments – 3.3-V, 12-BIT, 15 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER WITH POWER DOWN

THS1215
SLAS292A – MARCH 2001 – REVISED MARCH 2004
www.ti.com
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range, T_A (unless otherwise noted)
POWER SUPPLY
Supply voltage
AV_DD
DV_DD
ANALOG AND REFERENCE INPUTS
Reference input voltage
V_REFT
V_REFB
Reference voltage differential, V_REFT – V_REFB
Analog input voltage differential, (AIN+) – (AIN–)⁽¹⁾
Analog input capacitance, C_i
Clock input⁽²⁾
DIGITAL OUTPUTS
Minimum digital output load resistance, R_L
Maximum digital output load capacitance, C_i
DIGITAL INPUTS
High-level input voltage, V_IH
Low-level input voltage, V_IL
Clock frequency, f_CLK, See Note ⁽³⁾
Clock pulse duration, t_W(CLKL), t_W(CLKH)
Operating free-air temperature, T_A
f_CLK = 5 MHz to 15 MHz
f_CLK = 5 MHz to 15 MHz
f_CLK = 5 MHz to 15 MHz
CON1 = 0, CON0 = 1
CON1 = 1, CON0 = 0
f_CLK = 15 MHz
TH1215
TJ1215
MIN
NOM
MAX UNIT
3.0
3.3
3.6 V
2.0
1.05
0.95
–1.0
–2.0
0
100
0
2.4
DGND
5
30
0
–40
2.15
2.5
V
1.15
1.3
1.0
1.05 V
1.0 V
2.0 V
10 pF
AV_DD
V
kΩ
10
15 pF
DV_DD
V
0.8 V
30 MHz
33.3
36.7 ns
70 °C
85
(1) Based on V_REFT – V_REFB = 1.0 V, varies proportional to the V_REFT – V_REFB value. AIN+ and AIN– inputs must always be greater than 0 V
and less than AV_DD.
(2) Clock pin is referenced to AGND and powered by AV_DD.
(3) Clock frequency can be extended to this range without degradation of performance.
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