THS1215 Datasheet, PDF (14/22 Pages) Texas Instruments – 3.3-V, 12-BIT, 15 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER WITH POWER DOWN

THS1215
SLAS292A – MARCH 2001 – REVISED MARCH 2004
www.ti.com
of the converter is 3 V. Two problems have to be solved. The first is to shift common mode level (CML) from 0 V
to 1.5 V (AV_DD/2). To do that, a V bias voltage and an adequate ratio of R1 and R2 have to be selected. For
instance, if V bias = AV_DD = 3 V, then R1 = R2. The second is that the differential voltage has to be reduced from
4 V (2 x 2 V) to 1 V, and for that an attenuation of 4 to1 is needed. The attenuation is determined by the relation:
(R3||2R2)/((R3||2R2) + 2R1). One possible solution is R1 = R2 = R3 = 150 Ω. In this case, moreover, the input
impedance (2R1 + (R3||2R2)) is 400 Ω. The values can be changed to match any other input impedance. A
capacitor, C, connected from AIN+ to AIN- helps filter any high frequency noise on the inputs, also improving
performance. Note that the chosen value of capacitor C must take into account the highest frequency component
of the analog input signal.
VBIAS
VIN+ R1
R2
THS1215
AIN+
VIN− R1
R2
VBIAS
R3
AIN−
REFT
REFB
Figure 18. DC-Coupled Differential Input Circuit
A single-ended source may give better overall system performance when it is converted to a differential signal
before driving the THS1215. The configuration in Figure 19 takes a VIN of 1 V and drives the 1:1 transformer
ratio so that value of AIN+ and AIN– converts to full-scale value at the ADC digital output. With VIN at –1 V the
value at AIN+ and AIN– converts to 0 at the ADC digital outputs.
AVDD
2
THS1215
V _IN
AIN+
AIN−
REFT
REFB
Figure 19. Transformer Coupled Single-Ended Input
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