LP38859_15 Datasheet, PDF (4/25 Pages) Texas Instruments – 3A Fast-Response High-Accuracy LDO Linear Regulator With Soft Start

LP38859
SNVS337F – JUNE 2006 – REVISED SEPTEMBER 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾
V_IN supply voltage (survival)
V_BIAS supply voltage (survival)
V_SS soft-start voltage (survival)
V_OUT voltage (survival)
I_OUT current (survival)
Power dissipation⁽³⁾
Junction temperature
Storage temperature, T_stg
MIN
MAX
−0.3
6
−0.3
6
−0.3
6
−0.3
6
Internally limited
Internally limited
40
150
−65
150
UNIT
V
V
V
V
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the TI Sales Office/ Distributors for availability and specifications.
(3) Device power dissipation must be de-rated based on device power dissipation (P_D), ambient temperature (T_A), and package junction to
ambient thermal resistance (R_θJA). Additional heat-sinking may be required to ensure that the device junction temperature (T_J) does not
exceed the maximum operating rating. See the Application and Implementation section for details.
6.2 ESD Ratings
V_(ESD) Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
VALUE
±2000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
V_IN supply voltage
V_BIAS supply voltage
I_OUT
Junction temperature⁽¹⁾
MIN
(V_OUT + V_DO)
3
0
−40
NOM
MAX
V_BIAS
5.5
3
125
UNIT
V
V
A
°C
(1) Device power dissipation must be de-rated based on device power dissipation (P_D), ambient temperature (T_A), and package junction to
ambient thermal resistance (R_θJA). Additional heat-sinking may be required to ensure that the device junction temperature (T_J) does not
exceed the maximum operating rating. See the Application and Implementation section for details.
6.4 Thermal Information
THERMAL METRIC⁽¹⁾
LP38859
KTT (DDPAK/TO-263 NDH (TO-220)
UNIT
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
5 PINS
43.2
43.5
23.1
11.6
22.0
1.1
5 PINS
70.7 ⁽²⁾
43.0
n/a ⁽²⁾
23.6 ⁽²⁾
52.2 ⁽²⁾
1.3
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2) The NDH (TO-220) package is vertically mounted in center of JEDEC High-K test board (JESD 51-7) with no additional heat sink. This is
a through-hole package; this is NOT a surface mount package.
4
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