LP38859_15 Datasheet, PDF (12/25 Pages) Texas Instruments – 3A Fast-Response High-Accuracy LDO Linear Regulator With Soft Start

LP38859
SNVS337F – JUNE 2006 – REVISED SEPTEMBER 2015
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Feature Description (continued)
Because V_REF appears on the SS pin, any leakage through C_SS causes V_REF to fall, and thus affect V_OUT. A
leakage of 50 nA (about 10 MΩ) through C_SS causes V_OUT to be approximately 0.1% lower than nominal, while a
leakage of 500 nA (about 1 MΩ) causes V_OUT to be approximately 1% lower than nominal. Typical ceramic
capacitors have a factor of 10× difference in leakage between 25°C and 85°C, so the maximum ambient
temperature must be included in the capacitor selection process.
Typical C_SS values are in the range of 1 nF to 100 nF, providing typical soft-start times in the range of 70 μs to 7
ms (5τ). Values less than 1 nF can be used, but the soft-start effect is minimal. Values larger than 100 nF
provide soft start, but may not be fully discharged if V_BIAS falls from the UVLO threshold to less than 500 mV in
less than 100 µs.
Figure 19 shows the relationship between the C_OUT value and a typical C_SS value.
Figure 19. Typical C_SS vs C_OUT Values
The C_SS capacitor must be connected to a clean ground path back to the device ground pin. No components,
other than C_SS, should be connected to the SS pin, as there could be adverse effects to V_OUT.
If the soft-start function is not needed, the SS pin must be left open, although some minimal capacitance value is
always recommended.
7.4 Device Functional Modes
7.4.1 Operation with 3 V ≤ V_BIAS ≤ 5.5 V, V_OUT(TARGET)+ 0.3 V ≤ V_IN ≤ V_BIAS
The device operates if the bias voltage is equal to, or exceeds, 3 V, and input voltage is equal to, or exceeds,
V_OUT(TARGET) + 0.3 V. At bias voltages below the minimum V_BIAS requirement, the device does not operate
correctly, and output voltage may not reach target value.
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