74HC138D-T Datasheet, PDF (4/19 Pages) Texas Instruments – High-Speed CMOS Logic 3- to 8-Line Decoder/Demultiplexer Inverting and Noninverting

CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238
DC Electrical Specifications (Continued)
TEST
CONDITIONS
PARAMETER
HCT TYPES
SYMBOL V_I (V) I_O (mA)
High Level Input
Voltage
V_IH
-
-
Low Level Input
Voltage
V_IL
-
-
High Level Output
Voltage
CMOS Loads
V_OH V_IH or V_IL -0.02
High Level Output
-4
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
V_OL V_IH or V_IL 0.02
Low Level Output
4
Voltage
TTL Loads
Input Leakage
Current
I_I
V_CC and
0
GND
Quiescent Device
Current
I_CC
V_CC or
0
GND
Additional Quiescent
∆I_CC
V_CC
-
Device Current Per (Note 2) -2.1
Input Pin: 1 Unit Load
V_CC
(V)
4.5 to
5.5
4.5 to
5.5
4.5
4.5
4.5
4.5
5.5
5.5
4.5 to
5.5
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
MIN TYP MAX MIN MAX MIN MAX UNITS
2
-
-
2
-
2
-
V
-
-
0.8
-
0.8
-
0.8
V
4.4
-
-
4.4
-
4.4
-
V
3.98
-
-
3.84
-
3.7
-
V
-
-
0.1
-
0.1
-
0.1
V
-
-
0.26
-
0.33
-
0.4
V
-
±0.1
-
±1
-
±1
µA
-
-
8
-
80
-
160
µA
-
100 360
-
450
-
490
µA
NOTE:
2. For dual-supply systems, theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
UNIT LOADS
A0-A2
1.5
E1, E2
1.25
E3
1
NOTE:
360µA
mUanxitaLto2a5d^{oiCs.∆ICC}
limit
specified
in
DC
Electrical
Table,
e.g.,
Switching Specifications Input t_r, t_f = 6ns
PARAMETER
HC TYPES
Propagation Delay
Address to Output
TEST
25^oC
SYMBOL CONDITIONS V_CC (V) MIN TYP MAX
t_PLH, t_PHL C_L = 50pF
C_L = 15pF
C_L = 50pF
2
-
- 150
4.5
-
-
30
5
-
13
-
6
-
-
26
-40^oC TO
85^oC
-55^oC TO 125^oC
MIN MAX MIN MAX UNITS
-
190
-
225 ns
-
38
-
45
ns
-
-
-
-
ns
-
33
-
38
ns
4