74HC138D-T Datasheet, PDF (2/19 Pages) Texas Instruments – High-Speed CMOS Logic 3- to 8-Line Decoder/Demultiplexer Inverting and Noninverting

CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238
Pinout
CD54HC138, CD54HCT138, CD54HC238, CD54HCT238
(CERDIP)
CD74HC138, CD74HCT138, CD74HCT238
(PDIP, SOIC)
CD74HC238
(PDIP, SOIC, SOP, TSSOP)
TOP VIEW
A0 1
A1 2
A2 3
E1 4
E2 5
E3 6
(Y7) Y7 7
GND 8
16 V_CC
15 Y0 (Y0)
14 Y1 (Y1)
13 Y2 (Y2)
12 Y3 (Y3)
11 Y4 (Y4)
10 Y5 (Y5)
9 Y6 (Y6)
Functional Diagram
1
A0
2
A1
3
A2
4
E1
5
E2
6
E3
HC/HCT HC/HCT
238 138
15
Y0
Y0
14
Y1
Y1
13
Y2
Y2
12
Y3
Y3
11
Y4
Y4
10
Y5
Y5
9
Y6
Y6
7
Y7
Y7
Signal names in parentheses are for ’HC138 and ’HCT138.
TRUTH TABLE ’HC138, ’HCT138
INPUTS
ENABLE
ADDRESS
OUTPUTS
E3
E2
E1
A2
A1
A0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
X
H
X
X
X
H
H
H
H
H
H
H
H
L
X
X
X
X
X
H
H
H
H
H
H
H
H
X
H
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
L
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
L
H
H
H
H
L
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care
TRUTH TABLE ’HC238, ’HCT238
INPUTS
ENABLE
ADDRESS
OUTPUTS
E3
E2
E1
A2
A1
A0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
X
H
X
X
X
L
L
L
L
L
L
L
L
L
X
X
X
X
X
L
L
L
L
L
L
L
L
X
H
X
X
X
X
L
L
L
L
L
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
H
L
H
L
L
L
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
L
L
H
L
L
L
H
H
L
L
L
H
L
L
L
L
H
L
L
H
L
L
L
L
L
L
H
L
L
L
H
L
L
H
L
H
L
L
L
L
L
H
L
L
H
L
L
H
H
L
L
L
L
L
L
L
H
L
H
L
L
H
H
H
L
L
L
L
L
L
L
H
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care
2