ADS61B29 Datasheet, PDF (35/61 Pages) Texas Instruments – 14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer

ADS61B29
ADS61B49
www.ti.com ......................................................................................................................................... SLWS214A – OCTOBER 2008 – REVISED DECEMBER 2008
TYPICAL CHARACTERISTICS - ADS61B29 (continued)
All plots are at 25°C, AVDD = 3.3 V, DRVDD = 1.8 V, maximum rated sampling frequency, sine wave input clock. 1.5-V_PP
differential clock amplitude, 50% clock duty cycle, –1 DBFS differential analog input, internal reference mode, 0-dB gain,
LVDS output interface (unless otherwise noted)
PERFORMANCE
vs
INPUT AMPLITUDE
120
85
SFDR (dBFS)
100
80
80
75
SNR (dBFS)
60
70
40
20
−60
SFDR (dBc)
−50
−40
−30
65
f_IN = 65 MHz
60
−20
−10
0
Input Amplitude − dBFS
G030
Figure 42.
SFDR
vs
TEMPERATURE and AVDD
95
93
AV_DD = 3.5 V
AV_DD
=
3.4
VDf_IN^R=VD₆^D₅
= 1.8
MHz
V
91
89
AV_DD = 3.6 V
87
85
83
81
79
AV_DD = 3 V
77
75
−40 −20
AV_DD = 3.3 V
AV_DD = 3.2 V
AV_DD = 3.1 V
0
20
40
60
80
T_A − Free-Air Temperature − °C
G032
Figure 44.
PERFORMANCE
vs
INPUT COMMON-MODE VOLTAGE
92
74
f_IN = 65 MHz
External Reference Mode
90
73
SFDR
88
72
86
71
SNR
84
70
82
69
2.00 2.05 2.10 2.15 2.20 2.25 2.30 2.35 2.40
V_CM − Common-Mode Voltage − V
G031
Figure 43.
SFDR
vs
TEMPERATURE and DRVDD
95
AV_DD = 3.3 V
93 ^{fIN = 65 MHz}
DRV_DD = 1.9 V
91
DRV_DD = 2 V
89
87
85
−40
DRV_DD = 1.7 V
DRV_DD = 1.8 V
−20
0
20
40
60
T_A − Free-Air Temperature − °C
Figure 45.
80
G033
Copyright © 2008, Texas Instruments Incorporated
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