ADS61B29 Datasheet, PDF (14/61 Pages) Texas Instruments – 14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer

ADS61B29
ADS61B49
SLWS214A – OCTOBER 2008 – REVISED DECEMBER 2008 ......................................................................................................................................... www.ti.com
DEVICE CONFIGURATION
The ADS61B49/29 can be configured independently using either parallel interface control or serial interface
programming.
PARALLEL CONFIGURATION ONLY
To put the device in parallel configuration mode, keep RESET tied to high (DRVDD).
Now, pins DFS, MODE, SEN, and SDATA can be used to directly control certain modes of the ADC. The device
can be easily configured by connecting the parallel pins to the correct voltage levels (as described in Table 3 to
Table 6). There is no need to apply reset.
In this mode, SEN and SDATA function as parallel interface control pins. Frequently used functions can be
controlled in this mode – standby, selection between LVDS/CMOS output formats, 2s complement/straight binary
output format, and position of the output clock edge.
Table 1 briefly describes the modes controlled by the parallel pins.
PIN
DFS
MODE
SEN
SDATA
TYPE OF
CONTROL
Analog
Analog
Analog
Digital
Table 1. Parallel Pin Functions
CONTROL MODES
Data format and LVDS/CMOS output interface.
In the ADS61B49/B29, external reference is not supported. Prior use
of the MODE pin in the ADS6149/29 family is therefore not the same
in the ADS61B49/B29 family. In the next generation pin-compatible
ADC family, MODE is converted to a digital control pin for certain
reserved functions. The MODE pin can be routed to a digital controller
for possible future migration to a next generation ADC.
CLKOUT edge programmability.
Global power down (ADC, internal references and output buffers are
powered down)
SERIAL INTERFACE CONFIGURATION ONLY
To exercise this mode, first the serial registers have to be reset to their default values and the RESET pin has to
be kept low.
SEN, SDATA, and SCLK function as serial interface pins in this mode and can be used to access the internal
registers of the ADC.
The registers can be reset either by applying a pulse on the RESET pin or by setting the <RESET> bit (D7 in
register 0x00) high. The serial interface section describes register programming and register reset in more detail.
Since the parallel pin DFS is not to be used in this mode, it has to be tied to ground.
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