English
Language : 

ADS62P49 Datasheet, PDF (34/76 Pages) Texas Instruments – Dual Channel 14-/12-Bit, 250-/210-MSPS ADC With DDR LVDS and Parallel CMOS Outputs
ADS62P49 / ADS62P29
ADS62P48 / ADS62P28
SLAS635A – APRIL 2009 – REVISED JUNE 2009............................................................................................................................................................. www.ti.com
PIN CONFIGURATION (CMOS MODE) – ADS62P29/P28
RGC Package
(Top View)
DRVDD
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
RESET
SCLK
SDATA
SEN
AVDD
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
Thermal Pad
41
9
(Connected to DRGND)
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
DRVDD
DA5
DA4
DA3
DA2
DA1
DA0
NC
NC
DRGND
DRVDD
CTRL3
CTRL2
CTRL1
AVDD
AVDD
Figure 14.
P0056-17
PIN ASSIGNMENTS (CMOS MODE) – ADS62P49/P48 and ADS62P29/P28
NAME
PIN
NO.
NO. OF
PINS
I/O
DESCRIPTION
AVDD
16, 33, 34
3
I Analog power supply
AGND
17, 18, 21, 24,
27, 28, 31, I32
8
I Analog ground
CLKP, CLKM
25, 26
2
I Differential clock input
INP_A, INM_A
29, 30
2
I Differential analog input, Channel A
INP_B, INM_B
19, 20
2
I Differential analog input, Channel B
VCM
23
1
IO Internal reference mode – Common-mode voltage output.
External reference mode – Reference input. The voltage forced on this pin sets the
internal references.
RESET
12
1
I Serial interface RESET input.
When using the serial interface mode, the user MUST initialize internal registers through
hardware RESET by applying a high-going pulse on this pin or by using software reset
option. Refer to SERIAL INTERFACE section.
34
Submit Documentation Feedback
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): ADS62P49 / ADS62P29 ADS62P48 / ADS62P28