PCI1410 Datasheet, PDF (31/145 Pages) Texas Instruments – PC CARD CONTROLLERS

Table 2–13. 16-Bit PC Card Interface Control Terminals
TERMINAL
NAME
NUMBER
I/O
GGU PGE GHK
DESCRIPTION
BVD1
(STSCHG/RI) ^C5
135 E10
Battery voltage detect 1. BVD1 is generated by 16-bit memory PC Cards that include
batteries. BVD1 is used with BVD2 as an indication of the condition of the batteries on a
memory PC Card. Both BVD1 and BVD2 are high when the battery is good. When BVD2
is low and BVD1 is high, the battery is weak and should be replaced. When BVD1 is low,
the battery is no longer serviceable and the data in the memory PC Card is lost. See
I ^{Section 5.6, ExCA Card Status-Change-Interrupt Configuration Register, for enable bits.}
See Section 5.5, ExCA Card Status-Change Register, and Section 5.2, ExCA Interface
Status Register, for the status bits for this signal.
Status change. STSCHG is used to alert the system to a change in the READY, write protect,
or battery voltage dead condition of a 16-bit I/O PC Card.
Ring indicate. RI is used by 16-bit modem cards to indicate a ring detection.
BVD2
(SPKR)
B5 134 C10
Battery voltage detect 2. BVD2 is generated by 16-bit memory PC Cards that include
batteries. BVD2 is used with BVD1 as an indication of the condition of the batteries on a
memory PC Card. Both BVD1 and BVD2 are high when the battery is good. When BVD2
is low and BVD1 is high, the battery is weak and should be replaced. When BVD1 is low,
the battery is no longer serviceable and the data in the memory PC Card is lost. See
Section 5.6, ExCA Card Status-Change-Interrupt Configuration Register, for enable bits.
See Section 5.5, ExCA Card Status-Change Register, and Section 5.2, ExCA Interface
I _{Status Register, for the status bits for this signal.}
Speaker. SPKR is an optional binary audio signal available only when the card and socket
have been configured for the 16-bit I/O interface. The audio signals from cards A and B are
combined by the PCI1410 and are output on SPKROUT.
DMA request. BVD2 can be used as the DMA request signal during DMA operations to a
16-bit PC Card that supports DMA. The PC Card asserts BVD2 to indicate a request for a
DMA operation.
CD1
CD2
L12 75 L19
A4 137 A9
Card detect 1 and card detect 2. CD1 and CD2 are internally connected to ground on the
I PC Card. When a PC Card is inserted into a socket, CD1 and CD2 are pulled low. For signal
status, see Section 5.2, ExCA Interface Status Register.
CE1
CE2
H13
G11
88
91
J14
H18
Card enable 1 and card enable 2. CE1 and CE2 enable even- and odd-numbered address
O bytes. CE1 enables even-numbered address bytes, and CE2 enables odd-numbered
address bytes.
INPACK
B8 123 E12
Input acknowledge. INPACK is asserted by the PC Card when it can respond to an I/O read
cycle at the current address.
I _{DMA request. INPACK can be used as the DMA request signal during DMA operations from}
a 16-bit PC Card that supports DMA. If it is used as a strobe, then the PC Card asserts this
signal to indicate a request for a DMA operation.
IORD
I/O read. IORD is asserted by the PCI1410 to enable 16-bit I/O PC Card data output during
host I/O read cycles.
F13 93 H14 O _{DMA write. IORD is used as the DMA write strobe during DMA operations from a 16-bit PC}
Card that supports DMA. The PCI1410 asserts IORD during DMA transfers from the PC
Card to host memory.
IOWR
I/O write. IOWR is driven low by the PCI1410 to strobe write data into 16-bit I/O PC Cards
during host I/O write cycles.
F10 96 G18 O _{DMA read. IOWR is used as the DMA write strobe during DMA operations from a 16-bit PC}
Card that supports DMA. The PCI1410 asserts IOWR during transfers from host memory
to the PC Card.
Output enable. OE is driven low by the PCI1410 to enable 16-bit memory PC Card data
output during host memory read cycles.
OE
G10 92 H17 O _{DMA terminal count. OE is used as terminal count (TC) during DMA operations to a 16-bit}
PC Card that supports DMA. The PCI1410 asserts OE to indicate TC for a DMA write
operation.
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