TL16C2552 Datasheet, PDF (30/34 Pages) Texas Instruments – 1.8-V to 5-V DUAL UART WITH 16-BYTE FIFOS

TL16C2552
SLWS163A – SEPTEMBER 2005 – REVISED JUNE 2006
Table 10. Baud Rates Using a 3.072-MHz Crystal (continued)
DESIRED BAUD
RATE
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
DIVISOR USED TO GENERATE 16×
CLOCK
1280
640
320
160
107
96
80
53
40
27
20
10
5
0.312
0.628
1.23
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Driver
External
XIN
Clock
Optional
Clock
Output
Optional
Driver
XOUT
V_CC
XIN
C1
Crystal
R_P
Oscillator Clock
to Baud Generator
Logic
RX2
XOUT
C2
V_CC
Oscillator Clock
to Baud Generator
Logic
Figure 27. Typical Clock Circuits
CRYSTAL
3.072 MHz
1.8432 MHz
16 MHz
Table 11. Typical Crystal Oscillator Network
R_P
1 MΩ
1 MΩ
1 MΩ
RX2 (optional)
1.5 kΩ
1.5 kΩ
0 kΩ
C1
10 - 30 pF
10 - 30 pF
33 pF
C2
40 - 60 pF
40 - 60 pF
33 pF
Receiver Buffer Register (RBR)
The ACE receiver section consists of a receiver shift register (RSR) and a RBR. The RBR is actually a 16-byte
FIFO. Timing is derived from the input clock divided by the programmed devisor. Receiver section control is a
function of the ACE line control register.
The ACE RSR receives serial data from RX. The RSR then concatenates the data and moves it into the RBR
FIFO. In the TL16C450 mode, when a character is placed in the RBR and the received data available interrupt is
enabled (IER0 = 1), an interrupt is generated. This interrupt is cleared when the data is read out of the RBR. In
the FIFO mode, the interrupts are generated based on the control setup in the FIFO control register.
Scratch Register
The scratch register is an 8-bit register that is intended for the programmer's use as a scratchpad in the sense
that it temporarily holds the programmer's data without affecting any other ACE operation.
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