DRV3203-Q1_15 Datasheet, PDF (30/37 Pages) Texas Instruments – Three-Phase Brushless Motor Driver

DRV3203-Q1
SLVSC09A – MAY 2013 – REVISED JUNE 2013
I/O
DIN
SCK
CTLxx
TEST
VCC
VDD
Level Shift
Rd
VDD
ENABLE
CLAMP
V5INT
Rd
V5INT
VCC
VCC
VDD
CS
PRN
Ru
Level Shift
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VDD
* V5INT is the internal power supply.
Figure 23. Input Buffer1 Block Diagram
VDD
VCC
VCC
Level Shift
FAULT
Figure 24. Output Buffer1 Block Diagram
VDD
VCC
VCC
Level Shift
EN
DOUT
Figure 25. Output Buffer2 Block Diagram
VDD
VCC
Level Shift
VCC
VCC
R_RES
RES
Figure 26. Output Buffer3 Block Diagram
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