TMS320F206_06 Datasheet, PDF (3/58 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

TMS320F206
DIGITAL SIGNAL PROCESSOR
SPRS050A – NOVEMBER 1996 – REVISED APRIL 1998
TMS320F206 Terminal Functions
TERMINAL
NAME
NO.
TYPE†
DESCRIPTION
DATA AND ADDRESS BUSES
D15
41
Parallel data bus D15 [most significant bit (MSB)] through D0 [least significant bit (LSB)]. D15–D0 are
D14
40
used to transfer data between the TMS320F206 and external data / program memory or I / O devices.
D13
39
Placed in the high-impedance state when not outputting (R / W high) or RS when asserted. They go into
D12
38
the high-impedance state when OFF is active low.
D11
36
D10
34
D9
33
D8
D7
32
31
I/O/Z
D6
29
D5
28
D4
27
D3
26
D2
24
D1
23
D0
22
A15
74
Parallel address bus A15 (MSB) through A0 (LSB). A15–A0 are used to address external data / program
A14
73
memory or I / O devices. These signals go into the high-impedance state when OFF is active low.
A13
72
A12
71
A11
69
A10
68
A9
67
A8
A7
66
64
O/Z
A6
62
A5
61
A4
60
A3
58
A2
57
A1
56
A0
55
MEMORY CONTROL SIGNALS
PS
53
O/Z
Program-select signal. PS is always high unless low-level asserted for communicating to off-chip program
space. PS goes into the high-impedance state when OFF is active low.
DS
51
O/Z
Data-select signal. DS is always high unless low-level asserted for communicating to off-chip program
space. DS goes into the high-impedance state when OFF is active low.
IS
52
O/Z
I / O space-select signal. IS is always high unless low-level asserted for communicating to I/O ports. IS
goes into the high-impedance state when OFF is active low.
READY
Data-ready input. READY indicates that an external device is prepared for the bus transaction to be
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I
completed. If the external device is not ready (READY low), the TMS320F206 waits one cycle and checks
READY again. If READY is not used, it should be pulled high.
R/W
Read / write signal. R / W indicates transfer direction when communicating with an external device. R/W
47
O/Z is normally in read mode (high), unless low level is asserted for performing a write operation. R / W goes
into the high-impedance state when OFF is active low.
Read-select indicates an active, external read cycle. RD is active on all external program, data, and I / O
RD
45
O/Z
reads. RD goes into the high-impedance state when OFF is active low. The function of the RD pin can
be programmed to provide an inverted R/W signal instead of RD. The FRDN bit (bit 15) in the PMST
register controls this selection.
† _{I = input, O = output, Z = high impedance, PWR = power, GND = ground}
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