MSC1211 Datasheet, PDF (3/105 Pages) Texas Instruments – Precision Analog-to-Digital Converter (ADC) and Digital-to-Analog Converters (DACs) with 8051 Microcontroller and Flash Memory

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MSC121xYX FAMILY FEATURES
FEATURES(1)
Flash Program Memory (Bytes)
Flash Data Memory (Bytes)
Internal Scratchpad SRAM (Bytes)
Internal MOVX RAM (Bytes)
Externally Accessible Memory (Bytes)
MSC121xY2⁽²⁾
Up to 4k
Up to 4k
256
1024
64k Program, 64k Data
MSC121xY3⁽²⁾
Up to 8k
Up to 8k
256
1024
64k Program, 64k Data
(1) _{All peripheral features are the same on all devices; the flash memory size is the only difference.}
(2) _{The last digit of the part number (N) represents the onboard flash size = (2}N_)kBytes.
MSC1211, MSC1212
MSC1213, MSC1214
SBAS323D − JUNE 2004 − REVISED SEPTEMBER 2005
MSC121xY4⁽²⁾
Up to 16k
Up to 16k
256
1024
64k Program, 64k Data
MSC121xY5⁽²⁾
Up to 32k
Up to 32k
256
1024
64k Program, 64k Data
ELECTRICAL CHARACTERISTICS: AV_DD = 5V
All specifications from TMIN to TMAX, DVDD = +2.7V to 5.25V, AVDD = +5V, fMOD = 15.625kHz, PGA = 1, filter = Sinc3, Buffer ON, fDATA = 10Hz, Bipolar, fCLK = 8MHz,
and VREF ≡ (REF IN+) − (REF IN−) = +2.5V, unless otherwise noted. For VDAC, VREF = AVDD, RLOAD = 10kΩ, and CLOAD = 200pF, unless otherwise noted.
MSC1211/12/13/14
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Analog Inputs (AIN0−AIN7, AINCOM)
Analog Input Range
Full-Scale Input Voltage Range
Differential Input Impedance
Input Current
Bandwidth
Fast Settling Filter
Sinc2 Filter
Sinc3 Filter
Programmable Gain Amplifier
Input Capacitance
Input Leakage Current
Burnout Current Sources
Buffer OFF
Buffer ON
(AIN+) − (AIN−)
Buffer OFF
Buffer ON
−3dB
−3dB
−3dB
User-Selectable Gain Range
Buffer ON
Multiplexer Channel ON, T = +25°C
Buffer ON
AGND − 0.1
AVDD + 0.1
V
AGND + 50mV
AVDD − 1.5
V
±VREF/PGA
V
7/PGA(1)
MΩ
0.5
nA
0.469 • f_DATA
0.318 • f_DATA
0.262 • f_DATA
1
128
9
pF
0.5
pA
±2
µA
ADC Offset DAC
Offset DAC Range
Offset DAC Monotonicity
Offset DAC Gain Error
Offset DAC Gain Error Drift
Bipolar Mode
±V_REF/(2 • PGA)
8
±1.5
1
V
Bits
% of Range
ppm/°C
System Performance
Resolution
24
ENOB
See Typical Characteristics
22
Output Noise
See Typical Characteristics
No Missing Codes
Sinc³ Filter, Decimation >360
24
Integral Nonlinearity
End Point Fit, Bipolar Mode
3
±0.0015
Offset Error
Offset Drift(2)
Gain Error(3)
Gain Error Drift(2)
After Calibration
Before Calibration
After Calibration
Before Calibration
±3.5
0.001
−0.002
0.5
System Gain Calibration Range
80
120
System Offset Calibration Range
−50
50
At DC
115
Common-Mode Rejection
fCM = 60Hz, fDATA = 10Hz
fCM = 50HZ, fDATA = 50Hz
130
120
fCM = 60Hz, fDATA = 60Hz
120
Normal-Mode Rejection
fSIG = 50Hz, fDATA = 50Hz
fSIG = 60Hz, fDATA = 60Hz
100
100
Power-Supply Rejection
At DC, dB = −20log(∆VOUT/∆VDD)(4)
92
(1) _{The input impedance for PGA = 128 is the same as that for PGA = 64 (that is, 7MΩ/64).}
(2) _{Calibration can minimize these errors.}
(3) _{The self gain calibration cannot have a REF IN+ of more than AVDD −1.5V with Buffer ON. To calibrate gain, turn Buffer OFF.}
(4) _{∆VOUT is change in digital result.}
(5) _{9pF switched capacitor at fSAMP clock frequency (see Figure 14).}
(6) _{Linearity calculated using a reduced code range of 512 to 65024; output unloaded.}
(7) _{Ensured by design and characterization; not production tested.}
(8) _{Analog Brownout Detect OFF (HCR1.3 = 1), Analog LVD OFF (LVDCON.7 = 1).}
Bits
Bits
Bits
%FSR
ppm of FS
ppm of FS/°C
%
ppm/°C
% of FS
% of FS
dB
dB
dB
dB
dB
dB
dB
3