MSC1211 Datasheet, PDF (100/105 Pages) Texas Instruments – Precision Analog-to-Digital Converter (ADC) and Digital-to-Analog Converters (DACs) with 8051 Microcontroller and Flash Memory

MSC1211, MSC1212
MSC1213, MSC1214
SBAS323D − JUNE 2004 − REVISED SEPTEMBER 2005
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Seconds Timer Interrupt (SECINT)
SFR F9h
7
WRT
6
SECINT6
5
SECINT5
4
SECINT4
3
SECINT3
2
SECINT2
1
SECINT1
0
SECINT0
Reset Value
7Fh
This system clock is divided by the value of the 16-bit register MSECH:MSECL. Then, that 1ms timer tick is divided by the
register HMSEC which provides the 100ms signal used by this seconds timer. Therefore, this seconds timer can generate
an interrupt which occurs from 100ms to 12.8 seconds. Reading this register will clear the Seconds Interrupt; however, AI
in EICON (SFR D8h) must also be cleared. This Interrupt can be monitored in the AIE or AIPOL registers.
WRT
bit 7
Write Control. Determines whether to write the value immediately or wait until the current count is finished.
Read = 0.
0 = Delay Write Operation. The SEC value is loaded when the current count expires.
1 = Write Immediately. The counter is loaded once the CPU completes the write operation.
SECINT6−0 Seconds Count. Normal operation would use 100ms as the clock interval.
bits 6−0
Seconds Interrupt = (1 + SEC) • (HMSEC + 1) • (MSEC + 1) • t_CLK.
Milliseconds Timer Interrupt (MSINT)
SFR FAh
7
WRT
6
MSINT6
5
MSINT5
4
MSINT4
3
MSINT3
2
MSINT2
1
MSINT1
0
MSINT0
Reset Value
7Fh
The clock used for this timer is the 1ms clock, which results from dividing the system clock by the values in registers
MSECH:MSECL. Reading this register is necessary for clearing the interrupt; however, AI in EICON (SFR D8h) must also
be cleared.
WRT
bit 7
Write Control. Determines whether to write the value immediately or wait until the current count is finished. Read = 0.
0 = Delay Write Operation. The MSINT value is loaded when the current count expires.
1 = Write Immediately. The MSINT counter is loaded once the CPU completes the write operation.
MSINT6−0 Milliseconds Count. Normal operation would use 1ms as the clock interval.
bits 6−0
MS Interrupt Interval = (1 + MSINT) • (MSEC + 1) • t_CLK
One Microsecond Timer (USEC)
7
6
SFR FBh
0
0
5
FREQ5
4
FREQ4
3
FREQ3
2
FREQ2
1
FREQ1
0
FREQ0
Reset Value
03h
FREQ5−0 Clock Frequency − 1. This value + 1 divides the system clock to create a 1µs Clock.
bits 5−0 USEC = CLK/(FREQ + 1). This clock is used to set Flash write time. See FTCON (SFR EFh).
One Millisecond Timer Low Byte (MSECL)
SFR FCh
7
MSECL7
6
MSECL6
5
MSECL5
4
MSECL4
3
MSECL3
2
MSECL2
1
MSECL1
0
MSECL0
Reset Value
9Fh
MSECL7−0 One Millisecond Timer Low Byte. This value in combination with the next register is used to create a 1ms clock.
bits 7−0
1ms = (MSECH • 256 + MSECL + 1) • t_CLK. This clock is used to set Flash erase time. See FTCON (SFR EFh).
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