DRV8813_15 Datasheet, PDF (3/27 Pages) Texas Instruments – DRV8813 Dual-Bridge Motor Controller IC

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5 Pin Configuration and Functions
PWP Package
28-Pin HTSSOP
Top View
DRV8813
SLVSA72E – APRIL 2010 – REVISED OCTOBER 2015
PIN
NAME
NO.
POWER AND GROUND
CP1
1
CP2
2
GND
14, 28
VCP
3
VMA
4
VMB
11
V3P3OUT
15
CONTROL
AENBL
21
APHASE
20
AI0
24
AI1
25
AVREF
12
BENBL
22
BI0
26
BI1
27
BPHASE
23
I/O ⁽¹⁾
Pin Functions
DESCRIPTION
EXTERNAL COMPONENTS OR CONNECTIONS
IO
Charge pump flying capacitor
IO
Charge pump flying capacitor
—
Device ground
IO
High-side gate drive voltage
—
Bridge A power supply
—
Bridge B power supply
O
3.3-V regulator output
Connect a 0.01-μF, 50-V capacitor between CP1 and
CP2.
Connect a 0.1-μF, 16-V ceramic capacitor and a 1-MΩ
resistor to VM.
Connect to motor supply (8.2 V to 45 V). Both pins
must be connected to the same supply, bypassed with
a 0.1 uF capacitor to GND, and connected to
appropriate bulk capacitance.
Bypass to GND with a 0.47-μF 6.3-V ceramic
capacitor. Can be used to supply VREF.
I
Bridge A enable
Logic high to enable bridge A. Internal pulldown.
I
Bridge A phase (direction)
Logic high sets AOUT1 high, AOUT2 low. Internal
pulldown.
I
Bridge A current set
I
Sets bridge A current: 00 = 100%,
01 = 71%, 10 = 38%, 11 = 0
Internal pulldown.
Reference voltage for winding current set. Can be
I
Bridge A current set reference input
driven individually with an external DAC for
microstepping, or tied to a reference (for example,
V3P3OUT).
I
Bridge B enable
Logic high to enable bridge B. Internal pulldown.
I
Bridge B current set
I
Sets bridge B current: 00 = 100%,
01 = 71%, 10 = 38%, 11 = 0
Internal pulldown.
I
Bridge B phase (direction)
Logic high sets BOUT1 high, BOUT2 low. Internal
pulldown.
(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output
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