DRV8813_15 Datasheet, PDF (11/27 Pages) Texas Instruments – DRV8813 Dual-Bridge Motor Controller IC

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DRV8813
SLVSA72E – APRIL 2010 – REVISED OCTOBER 2015
The full-scale (100%) chopping current is calculated in Equation 1.
I_CHOP
V_REFX
5 u R_ISENSE
(1)
Example:
If a 0.25-Ω sense resistor is used and the VREFx pin is 2.5 V, the full-scale (100%) chopping current is 2.5 V
/ (5 × 0.25 Ω) = 2 A.
Two input pins per H-bridge (xI1 and xI0) are used to scale the current in each bridge as a percentage of the full-
scale current set by the VREF input pin and sense resistance. The xI0 and xI1 pins have internal pulldown
resistors of approximately 100 kΩ. The function of the pins is shown in Table 2.
Table 2. H-Bridge Pin Functions
xI1
xI0
RELATIVE CURRENT
(% FULL-SCALE CHOPPING CURRENT)
1
1
0% (Bridge disabled)
1
0
38%
0
1
71%
0
0
100%
When both xI bits are 1, the H-bridge is disabled and no current flows.
Example:
If a 0.25-Ω sense resistor is used and the VREF pin is 2.5 V, the chopping current is 2 A at the 100% setting
(xI1, xI0 = 00). At the 71% setting (xI1, xI0 = 01) the current is 2 A × 0.71 = 1.42 A, and at the 38% setting
(xI1, xI0 = 10) the current is 2 A × 0.38 = 0.76 A. If (xI1, xI0 = 11) the bridge disables and no current flows.
7.4.3 Decay Mode
During PWM current chopping, the H-bridge is enabled to drive current through the motor winding until the PWM
current chopping threshold is reached. This is shown in Figure 6 as case 1. The current flow direction shown
indicates the state when the xENBL pin is high.
Once the chopping current threshold is reached, the H-bridge can operate in two different states, fast decay or
slow decay.
In fast decay mode, once the PWM chopping current level has been reached, the H-bridge reverses state to
allow winding current to flow in a reverse direction. As the winding current approaches zero, the bridge is
disabled to prevent any reverse current flow. Fast decay mode is shown in Figure 6 as case 2.
In slow decay mode, winding current is recirculated by enabling both of the low-side FETs in the bridge. This is
shown in Figure 6 as case 3.
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