DRV8711_15 Datasheet, PDF (3/44 Pages) Texas Instruments – DRV8711 Stepper Motor Controller IC

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5 Pin Configuration and Functions
DRV8711
SLVSC40E – JUNE 2013 – REVISED MARCH 2015
DCP Package
38-Pin HTSSOP
Top View
CP1 ¹
CP2 2
VCP 3
VM 4
GND 5
V5 ⁶
VINT ⁷
SLEEPn 8
RESET ⁹
STEP / AIN1 10
DIR / AIN2 11
BIN1 12
BIN2 13
SCLK 14
SDATI 15
SCS 16
SDATO 17
FAULTn 18
STALLn / BEMFVn ¹⁹
GND
(PPAD)
38 _GND
37 AOUT1
36 A1HS
35 A1LS
34 AISENP
33 AISENN
32 A2LS
31 A2HS
30 AOUT2
29 GND
28 BOUT1
27 B1HS
26 B1LS
25 BISENP
24 BISENN
23 B2LS
22 B2HS
21 BOUT2
20 BEMF
Pin Functions
PIN
NAME
NO.
I/O ⁽¹⁾
DESCRIPTION
EXTERNAL COMPONENTS OR CONNECTIONS
POWER AND GROUND
GND
5, 29,
38,
PPAD
— Device ground
All pins must be connected to ground
VM
4
— Bridge A power supply
Connect to motor supply voltage. Bypass to GND with a 0.01-μF
ceramic capacitor plus a 100-μF electrolytic capacitor.
VINT
7
— Internal logic supply voltage
Logic supply voltage. Bypass to GND with a 1-μF 6.3-V X7R ceramic
capacitor.
V5
6
O 5-V regulator output
5-V linear regulator output. Bypass to GND with a 0.1-μF 10-V X7R
ceramic capacitor.
CP1
1
IO Charge pump flying capacitor
Connect a 0.1-μF X7R capacitor between CP1 and CP2. Voltage
CP2
2
IO Charge pump flying capacitor
rating must be greater than applied VM voltage.
VCP
3
IO High-side gate drive voltage
Connect a 1-μF 16-V X7R ceramic capacitor to VM
CONTROL
SLEEPn
8
I Sleep mode input
Logic high to enable device, logic low to enter low-power sleep mode
STEP/AIN1
10
I Step input/Bridge A IN1
Indexer mode: Rising edge causes the indexer to move one step.
External PWM mode: controls bridge A OUT1 Internal pulldown.
DIR/AIN2
11
I Direction input/Bridge A IN2
Indexer mode: Level sets the direction of stepping.
External PWM mode: controls bridge A OUT2 Internal pulldown.
BIN1
12
I Bridge B IN1
Indexer mode: No function
External PWM mode: controls bridge B OUT1 Internal pulldown.
BIN2
13
I Bridge B IN2
Indexer mode: No function
External PWM mode: controls bridge B OUT2 Internal pulldown.
RESET
9
I Reset input
Active-high reset input initializes all internal logic and disables the H-
bridge outputs. Internal pulldown.
SERIAL INTERFACE
SCS
16
I Serial chip select input
Active high to enable serial data transfer. Internal pulldown.
SCLK
14
I Serial clock input
Rising edge clocks data into part for write operations. Falling edge
clocks data out of part for read operations. Internal pulldown.
SDATI
15
I Serial data input
Serial data input from controller. Internal pulldown.
(1) Directions: I = input, O = output, OZ = 3-state output, OD = open-drain output, IO = input/output
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