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DRV8711_15 Datasheet, PDF (18/44 Pages) Texas Instruments – DRV8711 Stepper Motor Controller IC
DRV8711
SLVSC40E – JUNE 2013 – REVISED MARCH 2015
Itrip decrease
tON
tBLANK
Itrip
tOFF
tON
tBLANK
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tOFF
Decrease in Itrip terminates
cycle, fast decay begins
When I < Itrip in fast decay
change to slow decay
Itrip increase
tON
tBLANK
tON
tBLANK
tOFF
Itrip
Increase in Itrip terminates
cycle, bridge turns on
Figure 11. Itrip Level Changing During a PWM Cycle
On
Fast
Decay
Slow
Decay
To accurately detect zero current, an internal offset has been intentionally placed in the zero current detection
circuit. If an external filter is placed on the current sense resistor to the xISENN and xISENP pins, symmetry
must be maintained. This means that any resistance between the bottom of the RISENSE resistor and xISENN
must be matched by the same resistor value (1% tolerance) between the top of the RISENSE resistor and xISENP.
Ensure a maximum resistance of 500 Ω. The capacitor value should be chosen such that the RC time constant is
between 50 ns and 60 ns. Any external filtering on these pins is optional and not required for operation.
VM
x1HS
PWM
logic
Gate
Drive
&
OCP
xOUT1
x1LS
VM
x2HS
Gate
Drive
&
OCP
xOUT2
x2LS
Comp
Comp
ISEN
amp
xISENP
CR
xISENN
RISENSE
R
Optional Filtering
Figure 12. Optional Filtering Between RISENSE and xINSENx
7.3.6 Blanking Time
After the current is enabled in an H-bridge, the voltage on the ISEN pin is ignored for a period of time before
enabling the current sense circuitry. This blanking time is adjustable from 1 µS to 5.12 µs, in 20 ns increments,
by setting the TBLANK bits in the BLANK register. Note that the blanking time also sets the minimum on time of
the PWM.
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