English
Language : 

THS6007 Datasheet, PDF (29/36 Pages) Texas Instruments – DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
APPLICATION INFORMATION
SLOS334– DECEMBER 2000
PCB design considerations (continued)
D Proper power supply decoupling – Use a minimum of a 6.8-µF tantalum capacitor in parallel with a 0.1-µF
ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several
amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the
supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible
to the supply terminal. As this distance increases, the inductance in the connecting etch makes the capacitor
less effective. The designer should strive for distances of less than 0.1 inches between the device power
terminal and the ceramic capacitors.
Because of its power dissipation, proper thermal management of the THS6007 is required. Although there are
many ways to properly heatsink this device, the following steps illustrate one recommended approach for a
multilayer PCB with an internal ground plane.
1. Prepare the PCB with a top side etch pattern as shown in Figure 86. There should be etch for the leads as
well as etch for the thermal pad.
2. Place the thermal transfer holes in the area of the thermal pad. These holes should be 13 mils in diameter.
They are kept small so that solder wicking through the holes is not a problem during reflow.
3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps
dissipate the heat generated by the IC. These additional vias may be larger than the 13-mil diameter vias
directly under the thermal pad. They can be larger because they are not in the thermal pad area to be
soldered so that wicking is not a problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection
methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat
transfer during soldering operations. This makes the soldering of vias that have plane connections easier.
In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore,
the holes under the IC package should make their connection to the internal ground plane with a complete
connection around the entire circumference of the plated-through hole.
6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its
thermal transfer holes exposed. The bottom-side solder mask should cover the thermal transfer holes of
the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the
reflow process.
7. Apply solder paste to the exposed thermal pad area and all of the IC terminals.
8. With these preparatory steps in place, the THS6007 IC is simply placed in position and run through the
solder reflow operation as any standard surface-mount component. This results in a part that is properly
installed.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
29