THS6007 Datasheet, PDF (28/36 Pages) Texas Instruments – DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS

THS6007
DUAL DIFFERENTIAL LINE DRIVERS AND LOW-POWER RECEIVERS
SLOS334– DECEMBER 2000
APPLICATION INFORMATION
PCB design considerations
Proper PCB design techniques in two areas are important to assure proper operation of the THS6007. These
areas are high-speed layout techniques and thermal-management techniques. Because the THS6007 is a
high-speed part, the following guidelines are recommended.
D Ground plane – It is essential that a ground plane be used on the board to provide all components with a
low inductive ground connection. Although a ground connection directly to a terminal of the THS6007 is not
necessarily required, it is recommended that the thermal pad of the package be tied to ground. This serves
two functions. It provides a low inductive ground to the device substrate to minimize internal crosstalk and
it provides the path for heat removal.
D Input stray capacitance – To minimize potential problems with amplifier oscillation, the capacitance at the
inverting input of the amplifiers must be kept to a minimum. To do this, PCB trace runs to the inverting input
must be as short as possible, the ground plane should be removed under any etch runs connected to the
inverting input, and external components should be placed as close as possible to the inverting input. This
is especially true in the noninverting configuration. An example of this can be seen in Figure 85, which shows
what happens when 1.8 pF is added to the inverting input terminal in the noninverting configuration. The
bandwidth increases dramatically at the expense of peaking. This is because some of the error current is
flowing through the stray capacitor instead of the inverting node of the amplifier. Although, in the inverting
mode, stray capacitance at the inverting input has little effect. This is because the inverting node is at a
virtual ground and the voltage does not fluctuate nearly as much as in the noninverting configuration.
DRIVER
NORMALIZED FREQUENCY RESPONSE
vs
FREQUENCY
3
VCC = ±15 V
2 ^{VI = 200 mV}
RL = 25 Ω
1 ^{RF = 1 kΩ}
Gain = 1
0
–1
CI = 0 pF
(Stray C Only)
–2
CI = 1.8 pF
–3
1 kΩ
–4
Cin
Vin
–
Vout
–5
+
RL =
50 Ω 25 Ω
–6
–7
100
1M
10M
f – Frequency – Hz
100M
500M
Figure 85. Driver Normalized Frequency Response vs Frequency
28
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