DAC5682Z_09 Datasheet, PDF (29/59 Pages) Texas Instruments – 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)

DAC5682Z
www.ti.com ........................................................................................................................................................ SLLS853C – AUGUST 2007 – REVISED JUNE 2009
Register name: CONFIG14 – Address: 0x0E, Default = 0x00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SDO_func_sel(2:0)
OffsetB(12:8)
0
0
0
0
0
0
0
0
SDO_func_sel(2:0):
Selects the signal for output on the SDO pin. When using the 3 pin serial interface
mode, this allows the user to multiplex several status indicators onto the SDO pin. In 4
pin serial interface mode, programming this register to view one of the 5 available status
indicators will override normal SDO serial interface operation.
SDO_func_sel
(2:0)
000, 110, 111
001
010
011
100
101
Output to SDO
Normal SDO function
PLL_lock
DLL_lock
Pattern_err
FIFO_err
SLFTST_err
OffsetB(12:8): Upper 5 bits of the offset adjustment value for the B data path. (SYNCED via Offset_sync)
Register name: CONFIG15 – Address: 0x0F, Default = 0x00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
OffsetB(7:0)
0
0
0
0
0
0
0
0
OffsetB(7:0): Lower 8 bits of the offset adjustment value for the B data path. (SYNCED via Offset_sync)
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